Dynamic Input Buffer Allocation (DIBA) for Fault Tolerant Ethernet Packet Switching

In this paper, we describe a new fault-tolerant architecture to realize an ethernet layer-2 switch. This architecture includes a memory buffer scheduler to assign memory buffers dynamically to the input ports of the switch. To evaluate this architecture and produce throughput and latency projections, we have developed a switch simulator called NUSIM. This simulation environment has helped us identify performance bottlenecks and consider tradeoffs of various switch design parameters. Our results show that dynamic input buffer assignment can decrease the number of dropped packets by approximately 30% on average, while also providing for increased reliability. Our DIBA-Switch can tolerate N − 1 faulty input buffers in an N port switch. We have also found that throughput degrades linearly as a function of the number of faulty buffers, independent of workload.