Loop scheduling and bank type assignment for heterogeneous multi-bank memory
نویسندگان
چکیده
Many high-performance DSP processors employ multi-bank on-chip memory to improve performance and energy consumption. This architectural feature supports higher memory bandwidth by allowing multiple data memory accesses to be executed in parallel. However, making effective use of multi-bank memory remains difficult, considering the combined effect of performance and energy requirement. This paper studies the scheduling and assignment problem about how to minimize the total energy consumption while satisfying the timing constraint with heterogeneous multi-bank memory for applications with loop. An algorithm, TASL (Type Assignment and Scheduling for Loops), is proposed. The algorithm uses bank type assignment with the consideration of variable partition to find the best configuration for both memory and ALU. The experimental results show that the average improvement on energy-saving is significant by using TASL. © 2009 Elsevier Inc. All rights reserved.
منابع مشابه
Register and Memory Assignment for Non-orthogonal Architectures via Graph Coloring and MST Algorithms
Finding an optimal assignment of program variables into registers and memory is prohibitively difficult in code generation for application specific instruction-set processors (ASIPs). This is mainly because, in order to meet stringent speed and power requirements for embedded applications, ASIPs commonly employ non-orthogonal architectures which are typically characterized by irregular data pat...
متن کاملDiscounting of Letters of Credit; a Legal Analysis
Letter of Credit is an international payment instrument whereby the issuing bank undertakes to pay the beneficiary, against presentation of certain stipulated documents, according to the conditions of the Letter of Credit. Discounting of LC for the short-term financing of the seller, due to the independent and irrevocable undertaking of the bank to make payment, is prevalent. Beneficiary gets t...
متن کاملBPM / BPM + : Software - based Dynamic Memory Partitioning Mechanisms for Mitigating DRAM Bank - / Channel - level Interferences in
Main memory system is a shared resource in modern multicore machines that can result in serious interference leading to reduced throughput and unfairness. Many new memory scheduling mechanisms have been proposed to address the interference problem. However, these mechanisms usually employ relative complex scheduling logic and need modifications to memory controllers (MCs), which incur expensive...
متن کاملBPM / BPM + : Software - based Dynamic Memory Partitioning Mechanisms for Mitigating DRAM Bank - / Channel - level
Main memory system is a shared resource in modern multicore machines that can result in serious interference leading to reduced throughput and unfairness. Many new memory scheduling mechanisms have been proposed to address the interference problem. However, these mechanisms usually employ relative complex scheduling logic and need modifications to memory controllers (MCs), which incur expensive...
متن کاملUsing Neural Networks and Genetic Algorithms for Modelling and Multi-objective Optimal Heat Exchange through a Tube Bank
In this study, by using a multi-objective optimization technique, the optimal design points of forced convective heat transfer in tubular arrangements were predicted upon the size, pitch and geometric configurations of a tube bank. In this way, the main concern of the study is focused on calculating the most favorable geometric characters which may gain to a maximum heat exchange as well as a m...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید
ثبت ناماگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید
ورودعنوان ژورنال:
- J. Parallel Distrib. Comput.
دوره 69 شماره
صفحات -
تاریخ انتشار 2009