Emulation of a PRAM on Leveled Networks

We present efficient emulations of the CRCW PRAM on a large class of processor interconnection networks called leveled networks. This class includes the star graph and the n-way shuffle, which have the interesting property that the network diameter is sub-logarithmic in the network size. We show that a CRCW PRAM can be emulated optimally on these networks (i.e., each emulation step takes time linear in the network diameter). This is the first result that demonstrates PRAM emulation in less than logarithmic time. We also present an efficient emulation of the CRCW PRAM on an n x n mesh. Although an O(n)-time emulation algorithm for the mesh is known, the underlying constant in the run-time is large, making it impractical. We give an improved emulation algorithm whose time bound is only 4n + o(n). Comments University of Pennsylvania Department of Computer and Information Science Technical Report No. MSCIS-91-06. This technical report is available at ScholarlyCommons: http://repository.upenn.edu/cis_reports/402 Emulation Of A PRAM On Leveled Networks MS-CIS-91-06 GRASP LAB 251