Low Power Realization of FIR Filters Implemented using Distributed Arithmetic

| We present a technique for low power realization of Finite Impulse Response (FIR) lters implemented using Distributed Arithmetic. In most applications, the distribution pro le of input data values is known. The proposed technique uses a data encoding which can be tuned to the speci c distribution pro le so as to reduce toggles in the shift register chain. We present a generic Nega-Binary coding approach and show how a speci c Nega-Binary scheme can be derived to achieve maximum power reduction. We also show how the binary to Nega-binary conversion can be performed bit-serially with minimal area (and hence power dissipation) overhead. The paper nally presents a shift-free implementation which uses memory array to store data values. We present a technique based on Gray coded addressing to reduce the power dissipation in such implementations.