A Scalable Architecture for Binary Couplings Attractor Neural Networks

This paper presents a digital architecture with on-chip learning for Hoppeld attractor neural networks with binary weights. A new learning rule for the binary weights network is proposed that allows pattern storage up to capacity = 0:4 and incurs very low hardware overhead. Due to the use of binary couplings the network has minimal storage requirements. A exible communication structure allows to cascade multiple chips in order to build fully connected, block connected, or feed-forward networks. System performance and communication bandwidth scale linear with the number of chips. A prototype chip has been fabricated and is fully functional. A pattern recognition application shows the performance of the binary couplings network.