Voltage control considering the chip temperature in the three-dimensional stacked multi-core processors
نویسندگان
چکیده
منابع مشابه
12th Int'l Symposium on Quality Electronic Design
Three-dimensional integration has the potential to increase integration density and to reduce communication latency of chip-multiprocessors (CMPs). However, high power density (i.e., power dissipation per unit volume) due to the high integration incurs temperature-related problems in reliability, power consumption, performance, and system cooling cost. In this paper, we propose a design-time so...
متن کاملThermal Design Space Exploration of 3D Die Stacked Multi-core Processors Using Geospatial-Based Predictive Models
This paper presents novel 2D geospatial-based predictive models for exploring the complex thermal spatial behavior of three-dimensional (3D) die stacked multi-core processors at the early design stage. Unlike other analytical techniques, our predictive models can forecast the location, size and temperature of thermal hotspots. We evaluate the efficiency of using the models for predicting within...
متن کاملDynamic voltage frequency scaling-aware refresh management for 3D DRAM over processor architecture
ELECT Three-dimensional integrated systems that combine large-capacity dynamic random access memory (DRAM) with high-performance processors represent a promising solution to implementing high-performance computing. However, in such configurations stacked DRAM cells will inevitably be exposed to high temperatures generated by the processor, thereby necessitating DRAMs with high refresh rates dri...
متن کاملResource Management Design in 3D-Stacked Multicore Systems for Improving Energy Efficiency
Technology scaling and increasing power densities have led to a transition from single-core to multi-core processors, and the trend is now moving towards many-core architectures. Hundreds of millions of transistors can now be integrated on a single chip, however, they cannot be fully exploited due to interconnect/memory latency, power consumption, and yield related challenges. 3D integration is...
متن کاملPicoServer Revisited: On the Profitability of Eliminating Intermediate Cache Levels
The confluence of 3D stacking, emerging dense memory technologies, and low-voltage throughput-oriented manycore processors has sparked interest in single-chip servers as building blocks for scalable data-centric system design. These chips encapsulate an entire memory hierarchy within a 3D-stacked multi-die package. Stacking alters key assumptions of conventional hierarchy design, drastically in...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2014