Software-Based Test Integration in a SoC Design Flow
نویسندگان
چکیده
Hardware-based test imposes some constraints like area overhead and processing speed degradation. In addition, with the advance in hardware integration, system-on-achip (SoC) test activities using only automatic test equipments (ATEs) results in an expensive option. The main objective of this work is to investigate and evaluate pros and cons of software-based test. Techniques, such as pattern compaction based on LFSR reseeding are used to minimize some of the drawbacks. Another objective of this work is to introduce a Computer Aided Test (CAT) tool used to generate a C code for testing core-based SoCs. The benchmark c6288 are used to evaluate the proposed tool and test techniques.
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تاریخ انتشار 2003