Adaptive On-chip Ring Oscillator for FPGA based Systems

A new topology of a high-speed adaptive oscillator for on-chip clock generation, especially suitable for FPGA based systems, has been proposed here. The oscillator generates more precise dual phase dual frequency. The simulation results show 30% improvement over conventional approaches in performance parameters for the new circuit architecture.The optimized simple circuit and more stable operation make this oscillator an excellent candidate for high-speed processing systems.The proposed design has the power to adjust itself automatically to its maximum performance in all working conditions.