Minimization of Exclusive Sums of Multi-Valued Complex Terms for Logic Cell Arrays

| The paper proposes a new layout-driven multi-level logic factorization methodology for regular arrays of two-input cells, that can nd practical applications in ne-grain FPGA design, standard cell, gate matrix layout and sub-micron technologies. A new factorization algorithm for AND/OR/EXOR logic with multi-valued literals is introduced, that has application to minimization of Logic Cell Arrays, and improves on previous results 1, 2]. It is shown that an extended cube representation and eecient minimization rules can be used, that generalize the ESOP minimization approach from 3]. Results of program MINICT demonstrate big area savings for several functions.