Low Energy ILP Processors
نویسنده
چکیده
A major trend in the computing industry is the move towards computers in portable products. This can be seen as the sales of laptops now surpass desktops, the emergence of a new class of devices known as Personal Digital Assistants (PDA’s), and the growth in the sale of consumer electronics devices such as pagers, cellular phones, viewmen. For a large number of these products, battery life is an important consideration.
منابع مشابه
Design and Validation of a Simultaneous Multi-Threaded DLX Processor
| Modern day computer systems rely on two forms of parallelism to achieve high performance, parallelism between individual instructions of a program (ILP) and parallelism between individual threads (TLP). Superscalar processors exploit ILP by issuing several instructions per clock, and multiprocessors (MP) exploit TLP by running di erent threads in parallel on di erent processors. A fundamental...
متن کاملShrinking L1 Instruction Caches to Improve Energy-Delay in SMT Embedded Processors
Instruction caches are responsible for a high percentage of the chip energy consumption, becoming a critical issue for battery-powered embedded devices. We can potentially reduce the energy consumption of the first level instruction cache (L1-I) by decreasing its size and associativity. However, demanding applications may suffer a dramatic performance degradation, specially in superscalar multi...
متن کاملImpact of ILP-improving Code Transformations on Loop Buffer Energy
For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, software controlled clustered loop buffers are very energy efficient. However code transformations needed in VLIW compilers to reach a higher ILP potentially may have a large negative influence on the energy consumed in the instruction memori...
متن کاملCluster Level Multithreading for VLIW Processors
Clustered VLIW embedded processors have become widespread due to benefits of simple hardware and lowpower. However, the ILP inmost of the applications today is limited and discourages the design of wider issue processors. Simultaneous MultiThreading (SMT) is a well known technique to improve the resource utilization by exploiting thread level ILP. However, implementing SMT is not feasible for e...
متن کاملUltra-Low-Energy DSP Processor Design for Many-Core Parallel Applications
Background and Objectives: Digital signal processors are widely used in energy constrained applications in which battery lifetime is a critical concern. Accordingly, designing ultra-low-energy processors is a major concern. In this work and in the first step, we propose a sub-threshold DSP processor. Methods: As our baseline architecture, we use a modified version of an existing ultra-low-power...
متن کاملOptimum Instruction-level Parallelism (ILP) for Superscalar and VLIW Processors
Modern superscalar and VLIW processors fetch, decode, issue, execute, and retire multiple instructions per cycle. By taking advantage of instruction-level parallelism (ILP), processor performance can be improved substantially. However, increasing the level of ILP may eventually result in diminishing and negative returns due to control and data dependencies among subsequent instructions as well ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2001