Efficient Reachability Analysis and Refinement Checking of Timed Automata Using BDDs

For the formal specification and verification of real-time systems we use the modular formalism Cottbus Timed Automata (CTA), which is an extension of timed automata [AD94]. Matrix-based algorithms for the reachability analysis of timed automata are implemented in tools like Kronos, Uppaal, HyTech and Rabbit. A new BDD-based version of Rabbit, which supports also refinement checking, is now available. For the representation of the models we use an integer semantics for closed timed automata. Using this discretization, we are able to use a unique representation of the discrete state space (given by the locations) and the continuous state space (given by the clocks). We use an estimate-based strategy for variable ordering which dramatically compresses the BDD representation of the transition relation and the reachable configurations and thus leads to much more efficient verification. The restricted applicability of reachability analysis due to the high time complexity of the analysis for large models leads to the need of refinement checking for verification. We implemented an algorithm for checking the existence of a simulation relation to investigate the opportunities of refinement checking for Cottbus Timed Automata. Section 2 introduces our notation for modular modeling of real-time systems: we recall the formal definition of timed automata and our integer semantics for closed timed automata. In Sect. 3 we describe our implementation of reachability analysis and, in more detail, in Sect. 4 we define the corresponding refinement checking. In Sects. 3 and 4, we present performance results for some example models.