Program Environment for Designing of Application Specific Fpga-based Parallel Architectures

The program environment for automatic designing of the application specific parallel architectures (liked to VLSI processor arrays) is proposed. The environment consists of three compatible programs which allow to construct and to visualize the dependence graph of algorithms given by nested loops, and then mapping of these algorithms onto corresponding processor array architectures with desired parameters. The environment may be used for designing and optimization of application-specific parallel architectures destined to realization in FPGA or as ASIC. The paper includes the main steps of the proposed by authors method [8,9] of regular algorithms mapping, as well as the brief description of the proposed programs. Verification of the environment on the several linear algebra and signal processing algorithms proves its efficiency.