Compiler assisted Data Forwarding in VLIW/EPIC architectures
نویسندگان
چکیده
This paper proposes a mechanism for reducing the complexity of forwarding hardware in VLIW/EPIC processors. The necessary information for data forwarding is known at compile time. This paper proposes a way to incorporate the forwarding information along with the instruction itself, thereby reducing the hardware complexity of forwarding logic with implications for power saving and reducing chip area.
منابع مشابه
Software Thread Integration for Converting Tlp to Ilp on Vliw/epic Architectures
SO, WON. Software Thread Integration for Converting TLP to ILP on VLIW/EPIC Architectures. (Under the direction of Alexander G. Dean.) Multimedia applications are pervasive in modern systems. They generally require a significantly higher level of performance than previous workloads of embedded systems. They have driven digital signal processor makers to adopt high-performance architectures like...
متن کاملDual-thread Weld: A Technique for Latency Tolerance in Horizontal Architectures
This paper presents dual-thread Weld architecture for VLIW/EPIC processors. The dual-thread Weld model supports one main thread and one speculative thread running simultaneously in a VLIW/EPIC processor with a register file and a fetch unit per thread. This paper analyzes the cost-performance impact of the dual-thread Weld model, which includes analysis of migrating the disambiguation hardware ...
متن کاملAn Automatic System for Application-Specific Instruction Format Design and Code Generation for VLIW and EPIC processors
Introduction. Whereas the workstation and personal computer markets are rapidly converging on a small number of similar architectures, the embedded systems market is enjoying an explosion of architectural diversity. This diversity is driven by demands for higher performance at a lower cost and power consumption, and is propelled by the possibility of designing application-specific instruction-s...
متن کاملLow-power data forwarding for VLIW embedded architectures
In this paper, we propose a low-power approach to the design of embedded very long instruction word (VLIW) processor architectures based on the forwarding (or bypassing) hardware, which provides operands from interstage pipeline registers directly to the inputs of the function units. The power optimization technique exploits the forwarding paths to avoid the power cost of writing/reading short-...
متن کاملCompiler-assisted power optimization for clustered VLIW architectures
Clustered VLIW architectures solve the scalability problem associated with flat VLIW architectures by partitioning the register file and connecting only a subset of the functional units to a register file. However, inter-cluster communication in clustered architectures leads to increased leakage in functional components and a high number of register accesses. In this paper, we propose compiler ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2002