A fully integrated 5.5 GHz high-linearity low noise amplifier (LNA) using post-linearization technique, implemented in a 0.18μm RF CMOS technology, is demonstrated. The proposed technique adopts an additional folded diode with a parallel RC circuit as an intermodulation distortion (IMD) sinker. The proposed LNA not only achieves high linearity, but also minimizes the degradation of gain, noise ...

A CMOS low noise amplifier with current folded technique has been proposed for ultra-low voltage, ultra-low power biomedical applications. The target frequency is 2.4 GHz and the proposed LNA is implemented in standard 65 and 90 nm CMOS technologies. By exploiting forward body biasing technique in current folded architecture, the LNA is biased in subthreshold region with supply voltage of 350 m...

A design of RF down-conversion Gilbert-Cell, with 65 nm CMOS technology, at a supply voltage of 1.8 V, with a new degenerating structure to improve linearity. This architecture opens the way to more integrated CMOS RF circuits and to achieve a good characteristics in terms of evaluating parameters of RF mixers with a very low power consumption (2.17 mW). At 1.9 GHz RF frequency; obtained result...

An effective linearization technique capable of equalizing IM3 products resulting from an arbitrary out-of-band blocking scenario in a wideband direct conversion receiver is presented. IM3 products are regenerated in the RF analog domain of a low-power mixed-signal feedforward path and are used to cancel analogous signal terms in the original receiver at digital baseband via adaptive equalizati...

This paper presents an UWB low noise amplifier (LNA) based on current reused topology to achieve low power on overall circuit in the band of 3~16GHz. Measurement of the input and output reflection coefficient S11, S22 are less than 10 dB, the maximum amplifier gain S21 gives 9.7dB, the minimum of the noise figure is 4.2dB, the measured IIP3 is 8.5dBm at 6GHz. It consumes 11mW power consumption ...

A low-voltage and low-power RF mixer for WCDMA applications is presented. The paper presents a novel topology mixer that leads to a better performance in terms of isolation and power consumption for low supply voltage. The measuring results of the proposed mixer achieve: 7dB power conversion gain, 10.4dB double side band (DSB) noise figure, -2dBm input third-order intercept point (IIP3), and th...

A 3–8 GHz broadband mixer is presented in this paper. This broadband mixer is low power and high conversion gain. It provides current reuse and ac-coupled folded switching. This mixer is designed in TSMC 0.18-μm CMOS technology. This broadband mixer achieves simulated conversion gain of 9 ± 1.5 dB, a single sideband noise figure lower than 15.2 dB and IIP3 batter than −7 dBm. From 3–8GHz, at su...

This paper presents the design and simulation of a 5GHz monolithic low-noise amplifier integrated with an active Balun. Intended to WLAN applications, the fully integrated circuit was implemented in a 0.18μm CMOS technology. The simulations, optimized to noise performance, gain and minimum differential phase and magnitude error, were performed with BSIM3 model. Circuit simulations present 23dB ...

A newly proposed variable gain amplifier (VGA) topology is presented. The three-stage VGA offers a wide control gain range, which is independent on process variation, and is characterized by low-power, high linearity, wide range of control signal, and small chip size characteristics. The VGA is fabricated in 0.18μm CMOS technology and measurements show a gain variation of 83dB (-36~47dB) with a...

In this paper, a differential multi-band CMOS low noise amplifier (LNA), operated in a wide range from 800MHz~1700MHz, with wide-band interference rejection, linearity improvement and the capacitive cross-coupling technology, is proposed. The proposed differential multi-band CMOS low noise amplifier with high linearity performance and good interference rejection performance. The post-simulation...