The main aim of this paper is to design and implement efficient UART and test the UART with built in self testing technique . A new Test pattern generator is simulated and used in BIST architecture in order to reduce power dissipation. As we know that power dissipation is more during the test mode than in normal mode hence In this project the pattern generator used is the low power pattern gene...

The generation of significant power droop (PD) during at-speed test performed by Logic BIST is a serious concern for modern ICs. In fact, the PD originated during test may delay signal transitions of the circuit under test (CUT): an effect that may be erroneously recognized as delay faults, with consequent erroneous generation of test fails, and increase in yield loss. In this paper, we propose...

We present a new low-power BIST (built-in-self-test) for sequential circuits. State correlation analysis is first performed on the flip-flop values in the relaxed, compacted sequence for the undetected faults to extract spatial correlations among the flip-flops. The extracted spatial correlation matrix not only provides additional metrics through which the scan order may be altered, but also al...

This paper proposes a technique to extract urban built-up land features from Landsat Thematic Mapper (TM) and Enhanced Thematic Mapper Plus (ETM ) imagery taking two cities in southeastern China as examples. The study selected three indices, Normalized Difference Built-up Index (NDBI), Modified Normalized Difference Water Index (MNDWI), and Soil Adjusted Vegetation Index (SAVI) to represent thr...

We present a methodology to detect and measure the signal overshoots occurring on the interconnects of high-speed system-on-chips. Overshoots are known to inject hot-carriers into the gate oxide which cause permanent degradation of MOSFET transistors’ performance over time. We propose a built-in chip mechanism to detect overshoots, collect the occurrence information and scan them out efficientl...

This technical report contains the text of Nur Touba's thesis "Synthesis Techniques for Pseudo-Random Built-In Self-Test." The thesis appendices have appeared as CRC Technical Reports, and are not included here.

This work introduces a new board-level test technology based on specific synthesizable embedded instruments. The purpose of intelligent embedded instrument is to carry out a vast portion of test application related procedures, perform measurement and configuration of system components thus minimizing the usage of external test equipment. By replacing traditional test and measurement equipment w...

this research is aimed at developing a model for measuring and comparison amount of supply and demand for different urban services from quality of life and equity perspectives, in urban built-up areas. this paper explains different steps of implementing the model as a tool for evaluating accessibility of residents to various services according to two main criteria: land per capita and distance ...