This paper presents and implements a single-stage high-power-factor light-emitting diode (LED) driver with coupled inductors, suitable for streetlight applications. The presented LED driver integrates an interleaved buck-boost power factor correction (PFC) converter with coupled inductors and a half-bridge-type series-resonant converter cascaded with a full-bridge rectifier into a single-stage ...

in order to evaluate the effect of different crop management practices on corn (zea mays l.) net primary productivity (npp) and relative carbon allocation coefficients, a field experiment was conducted based on a completely randomized block design with four replications in the agricultural research station, ferdowsi university of mashhad, iran during two growing season 2008-2009 and 2009-2010. ...

An improved analogue front-end for measuring the high state of trapezoidal voltage pulses with transition duration of 3 μs is presented. A new measurement system, composed by a front-end and the state-of-the-art acquisition board NI PXI-5922, has been realized with improved Common Mode Rejection Ratio (CMRR) of more than 87 dB at DC and 3-sigma stability of ±0.65 ppm over 1 day. After highlight...

in this study an ultra-broad band, low-power, and high-gain cmos distributed amplifier (cmos-da) utilizing a new gain-cell based on the inductively peaking cascaded structure is presented. it is created bycascading of inductively coupled common-source (cs) stage and regulated cascode configuration (rgc).the proposed three-stage da is simulated in 0.13 μm cmos process. it achieves flat and high ...

In this paper, we propose a level shifter circuit capable of handling a wide input voltage range. The circuit is based on a conventional two-stage comparator, and has a distinctive feature in that it operates a current amplification scheme for ultra low-power operation. The proposed circuit can convert low-voltage input digital signals into high-voltage output digital signals. The circuit achie...

A new high performance second-generation CMOS current conveyor architecture is presented. It is built using a differential flipped voltage follower as its input buffer stage and a cascode current mirror as output stage. It is characterized by very low output impedance. It provides gain independent high bandwidth when used to implement a programmable gain voltage amplifier. Simulation and experi...

This paper presents the design and performance comparison of a two stage operational amplifier topology using CMOS and BiCMOS technology. This conventional op amp circuit was designed by using RF model of BSIM3V3 in 0.6 μm CMOS technology and 0.35 μm BiCMOS technology. Both the op amp circuits were designed and simulated, analyzed and performance parameters are compared. The performance paramet...

A new high speed low input current comparator is proposed in this paper. Based on a simple negative feedback scheme around the transimpedance stage with an emphasis on a very large loop-gain, the transformed voltage signal is maintained at the lowest swing that results in a speed improvement. On a 0.25um TSMC CMOS process, simulation results demonstrate propagation delays of 3.6ns with ±100nA i...

This paper presents a two-stage low-noise ultra-wideband amplifier to obtain high and smooth gain in 180nm CMOS Technology. The proposed structure has two common source stages with inductive feedback. First stage is designed about 3GHz frequency and second stage is designed about 8GHz. In simulation, symmetric inductors of TSMC 0.18um CMOS technology in ADS software is used.Simulations results ...