This paper describes a low-noise, 900-MHz, voltagecontrolled oscillator (VCO) fabricated in a 0.6m CMOS technology. The VCO consists of four-stage fully differential delay cells performing full switching. It utilizes dual-delay path techniques to achieve high oscillation frequency and obtain a wide tuning range. The VCO operates at 750 MHz to 1.2 GHz, and the tuning range is as large as 50%. Th...

This paper describes a 2.4 GHz passive switch mixer and a 5/2.5 GHz voltage-controlled negative Gm oscillator (VCO) with an inversion-mode MOS varactor. Both circuits are implemented using a 1P8M 0.13 μm process. The switch mixer has an input referred 1 dB compression point of −3.89 dBm and a conversion gain of −0.96 dB when the local oscillator power is +2.5 dBm. The VCO consumes only 1.75 mW,...

In this paper we describe a novel Phase-Locked Loop (PLL) design for clock management applications. Such PLLs should operate over a wide range of frequencies, have tight constraints on jitter, power consumption and acquisition time, while being dynamically programmable by software means. In addition to the conventional fine tuning loop, the PLL has a coarse tuning loop to control the operating ...

The CMOS PLL based Frequency Synthesizer is a vital role in Receiver front end Sub component. The main objective of this paper is to design a high frequency of oscillation, less phase noise and power efficient PLL. In general, the PLL contains PFD, Loop Filter, VCO and Frequency Divider. The VCO is a critical component in Phase Locked Loop for low power CMOS designs. Here the Source Coupled VCO...

this paper presents a wide band RF MEMS VCO operating at 10 GHz. The designed VCO is based on high performances RF MEMS solenoid inductor. We have used HFSS software for design and analysis of different RF MEMS solenoid inductors. Best performances are obtained using SU8 dielectric substrate and copper coil: Qmax= 60.9, L = 2.6 nH at 10 GHz, and SRF= 20.8 GHz. Moreover, we have investigated the...

This paper presents a 5-GHz-Band VCO designed for System-in-a-package (SiP) usage. The VCO consists of a CMOS-core and was designed and optimized concerning phase noise, current consumption and tuning-range by exploiting the potential of SiP-mounting. The measurement results as well as the theoretical background are presented. The chips were fabricated in a 0.35 μm BiCMOS-technology and operate...

A 900-MHz phase-locked loop frequency synthesizer implemented in a 0.6m CMOS technology is developed for the Wireless Integrated Network Sensors applications. It incorporates an automatic switched-capacitor (SC) discrete-tuning loop to extend the overall frequency tuning range to 20%, while the VCO gain ( VCO) resulting from the CMOS varactor continuous-tuning is kept low at only 20 MHz/V in or...

Based on the self-biased current-reuse complementary structure and interposed network, a low power LC voltage controlled oscillator (VCO) is presented, which can simultaneously achieve ultra-low power consumption and low phase noise. Firstly, thanks to the self-biased voltage-diving technique, the LC-VCO consumes ultra-low power consumption. Secondly, the novel interposed network can greatly im...

This paper presents a 20 GHz push-push VCO realized by a 10 GHz super-harmonic coupled quadrature oscillator for a quadrature 60 GHz frequency synthesizer. The output nodes are peaked by a tunable second harmonic resonator. The proposed VCO is implemented in 65 nm CMOS process. It achieves a tuning range of 3.5 GHz from 16.1 GHz to 19.6 GHz with a phase noise of −106 dBc/Hz at 1 MHz offset. The...

In this paper, a programmable phase-locked-loop (PLL)-based fractional-N frequency synthesizer, with the capacity of automatically adjusting the nominal frequency of voltage-controlled oscillator (VCO) is presented. The monolithic wideband VCO, with digital and analog control, is capable of operating from 1.6GHz to 2.5GHz. Analog control voltage is only varied from 0.8V to 1.2 V to improve the ...