The paper presents a simulation study of effect of interface fixed charges on the performance of the cylindrical nanowire MOSFET for different channel materials (Si, GaAs and Ge). The objective of the present work is to study the effect of hot carrier damage/stress induced damage/process damage/radiation damage induced fixed charges at the semiconductor-oxide interface of the cylindrical nanowi...

In this paper, we apply our proposed early parallel adaptive computing methodology for numerical solution of semiconductor device equations with triangular meshing technique. This novel simulation based on adaptive triangular mesh, finite volume, monotone iterative, and a posteriori error estimation methods, is developed and successfully implemented on a Linux-cluster with message passing inter...

The buried-oxide in SOI MOSFET inhibits heat dissipation in the Si film and leads to increase in transistor temperature. This paper reports a simple and accurate characterization method for the self-heating effect (SHE) in SOI MOSFET. The ac output conductance at a chosen bias point is measured at several frequencies to determine the thermal resistance ( ) and thermal capacitance ( ) associated...

In this paper, we generalize our proposed earlier computing method [10-11] to solve hydrodynamic semiconductor device equations. For submicron MOSFET devices, we simulate their temperature distribution by solving carrier energy balance equation with adaptive computational technique. This robust method based on: (1) the finite volume (FV) discertization scheme; (2) the monotone iterative (MI) al...

In this paper, for the first time, a two-dimensional (2D) analytical drain current model for sub-100 nm multi-layered gate material engineered trapezoidal recessed channel (MLGMETRC) MOSFET: a novel design is presented and investigated using ATLAS and DEVEDIT device simulators, to mitigate the large gate leakages and increased standby power consumption that arise due to continued scaling of SiO...

We report on a GaN metal-oxide-semiconductor field-effect-transistor (MOSFET) using atomic-layer-deposited (ALD) Al2O3 as the gate dielectric. Compared to a GaN metal-semiconductor field-effect-transistor (MESFET) of similar design, the MOSFET exhibits several orders of magnitude lower gate leakage and near three times higher channel current. This implies that the ALD Al2O3/GaN interface is of ...

A SiC high-k (HK) split-gate (SG) MOSFET is proposed with a Schottky barrier diode (SBD) integrated between the split gates, and investigated by numerical TCAD simulation. Results show that it has same breakdown voltage as an optimized practical k value of 30 for its insulation pillar, which results in highest (1857 V). The forward (VF) reverse recovery charge (QRR) device are 0.9 V 3.49 μC/cm2...

FinFET and UTBSOI (or ETSOI) FET are the two promising multi-gate FET candidates for sub-22nm CMOS technology. The BSIM-CMG and BSIM-IMG are the surface potential based physical compact models for multi-gate MOSFETs. The BSIM-CMG model has been developed to model common symmetric double, triple, quadruple and surround gate MOSFET. The BSIM-IMG model has been developed to model independent doubl...

The multi-level methodology for CMOS SOI/SOS IC element parameterization for VLSI radiation hardness prediction by CAD systems is developed. The methodology includes semiconductor technology simulation, CMOS SOI/SOS MOSFET device simulation with radiation effects, irradiated test structures investigation, radiation dependent SPICE model parameter extraction with ICCAP. The measured data of irra...

The integrity and issues related performance associated with scaling Si MOSFET channel length promotes research in new device SOI, double gate and GAA MOSFET. In this paper, we pr novel characteristic of horizontal rectangular gate MOSFETs with dual metal of gate we obtained using SILVACO TCAD tools. We will also exhibit some simulation results we obtained relating to the influence of some para...