We study the problems of non-preemptively scheduling and packing malleable and parallel tasks with precedence constraints to minimize the makespan. In the scheduling variant, we allow the free choice of processors; in packing, each task must be assigned to a contiguous subset. Malleable tasks can be processed on different numbers of processors with varying processing times, while parallel tasks...

The problem of scheduling a set of n unit execution time (UET) tasks subject to precedence constraints on m identical parallel processors is known to be N P -hard in the strong sense. However, polynomial time algorithms exist for some classes of precedence graphs. In this paper, we consider a class of divide-and-conquer graphs that naturally models the execution of the recursive control abstrac...

In the general form of multiprocessor precedence scheduling problems a set of n tasks to be executed on m processors is given. Each task requires exactly one unit of execution time and can run on any processor. A directed acyclic graph specifies the precedence constraints where an edge from task x to task y means task x must be completed before task y begins. A solution to the problem is a sche...

The problem of scheduling activities dynamic for a project, within the available resources and adhering to precedence relationships is NP hard combinatorial. Traditional approaches and their extensions are limited in application for simultaneous scheduling of resources with leveling. Considering the need for improved modeling and scheduling techniques, this paper proposes the use of Petrinet ba...

Scheduling and dispatching tools for High-Performance Computing (HPC) machines have the role of mapping incoming jobs to the available resources, trying to maximize equipment utilization and user satisfaction. Optimal Job Scheduling is a well-known NP-hard problem, forcing commercial schedulers to adopt greedy approaches based on rules. Constraint Programming (CP) is a well-known combinatorial ...

Link adaptation techniques aim to maximise the quality of service and resource utilisation in wireless networks. However, fairness must be taken into consideration, particularly, in low-mobility environments where the channel dynamic variation is small. The authors propose and analyse three link adaptation techniques [using joint power control (PC) and adaptive coding and modulation (ACM)] for ...

 Abstract—Virtual cellular manufacturing has attracted a lot of attention in recent years because traditional cellular manufacturing is inadequate under a highly dynamic manufacturing environment. In this paper, a new mathematical model is established for generating optimal production schedules for virtual cellular manufacturing systems operating under a multi-period manufacturing scenario. Th...

We present the SERRA Run-Time Scheduler Synthesis and Analysis Tool which automatically generates a run-time scheduler from a heterogeneous system-level specification in both Verilog HDL and C. Part of the runtime scheduler is implemented in hardware, which allows the scheduler to be predictable in being able to meet hard real-time constraints, while part is implemented in software, thus suppor...