In this paper, we performed the comparative analysis of power consumption of array multiplier circuit implemented with two adder modules and Self Adjustable Voltage level circuit (SVL). The adder modules chosen were 10 transistorStatic Energy Recovery CMOS adder and 8 transistor CMOS (SERF) circuits. At first, the circuit was simulated with adder modules without applying the SVL circuit. And se...

Multiple-threshold CMOS circuit, which has both high and low threshold transistors in a single chip, can be used to deal with the leakage problem in low voltage low power (LVLP) and high performance applications. The high threshold transistors can suppress the subthreshold leakage current, while the low threshold transistors are used to achieve the high performance. In this paper, we will intro...

This article is present high-precision multi-wave rectifier circuit operating in low voltage + 1.5 Volt current modes by CMOS technology 0.5 μm, receive input and give output in current mode, respond at high frequency period. The structure compound with high-speed current comparator circuit, current mirror circuit, and CMOS inverter circuit. PSpice program used for confirmation the performance ...

Emerging nonvolatile memory technologies are attracting interest from the system design level to implement alternatives conventional von-Neumann computing architectures. In particular, hafnium oxide-based ferroelectric (FE) technology is fully CMOS-compatible and has already been used for logic-in-memory architectures or compact ternary content addressable (TCAM) cells. These enable tight combi...

Abstract The fabrication of integrated circuits (ICs) employing two-dimensional (2D) materials is a major goal semiconductor industry for the next decade, as it may allow extension Moore’s law, aids in in-memory computing and enables advanced devices beyond conventional complementary metal-oxide-semiconductor (CMOS) technology. However, most circuital demonstrations so far utilizing 2D employ m...

In the past decades CMOS IC technologies have been constantly scaled down and at present they aggressively entered in the nanometer regime. Amongst the wide-ranging variety of circuit applications, integrated memories especially the SRAM cell layout has been significantly reduced. As it is very well know the reduction of size of CMOS involves an increase in physical parameters variation, this i...

| We present formula of propagation delay for static CMOS logic gates considering short-circuit current and current owing through gate capacitance and using the n-th power law MOSFET model which considers velocity saturation e ects. The short circuit current is represented by a piece-wise linear function, which enables detailed analysis of the transient behavior of a CMOS inverter. We found tha...

The growing gap between on-chip gates and off-chip I/O bandwidth argues for ever larger amounts of on-chip memory. Emerging portable consumer technology, such as digital cameras, will also require more memory than can easily be supported on logic-oriented ASIC processes. Most ASIC memory systems are P-load SRAM, but this circuit technology is neither dense nor power efficient. This paper descri...

Quantum-dot Cellular Automata (QCA) is an emerging and promising technology that provides significant improvements over CMOS. Recently QCA has been advocated as an applicant for implementing reversible circuits. However QCA, like other Nanotechnologies, suffers from a high fault rate. The main purpose of this paper is to develop a fault tolerant model of QCA circuits by redundancy in hardware a...

A precision CMOS voltage reference circuit is very important for the design of the stable voltage down converter of the high density VLSIs. By using the active mode operation of the component MOS transistors a CMOS bandgap type reference voltage circuit was redesigned for the enhancement of the circuit stability against the internal noises. The voltage supply independence, temperature independe...