نتایج جستجو برای: cmos memory circuit

تعداد نتایج: 377410  

2013
SangHak Shin Jun-Myung Choi Seongik Cho Kyeong-Sik Min

In this paper, a CMOS emulator circuit that can reproduce nanoscale memristive behavior is proposed. The proposed emulator circuit can mimic the pinched hysteresis loops of nanoscale memristor memory's current-voltage relationship without using any resistor array, complicated circuit blocks, etc. that may occupy very large layout area. Instead of using a resistor array, other complicated circui...

Journal: :IEICE Transactions 2008
Masashi Kato Nobuyuki Terada Hirofumi Ohata Eisuke Arai

SUMMARY This letter presents a low-power switched current (SI) memory cell with CMOS-type configuration. By combining nMOS and pMOS in the SI memory cell and using a polarity discrimination circuit, we design a CMOS-type SI memory cell which eliminates the quiescent current in the SI memory cell. The simulation result shows that the CMOS-type SI memory cell consumes less power than the conventi...

2011
Fengbo Ren Kang L. Wang Chih-Kong Ken Yang Dejan Marković

of the Thesis Energy-Performance Characterization of CMOS/Magnetic Tunnel Junction (MTJ) Hybrid Logic Circuits by Fengbo Ren Master of Science in Electrical Engineering University of California, Los Angeles, 2011 Professor Dejan Marković, Chair Magnetic Tunnel Junction (MTJ) devices are CMOS compatible with high stability, high reliability and non-volatility. All these features are promising fo...

2012
B. P. Singh Suman Nehra K. G. Sharma Tripti Sharma A. Alvandpour P. Larsson-Edefors M. W. Allam M. H. Anis T. Sharma N. Arora Manisha Sharma Neha Arora

Domino CMOS logic circuit family finds a wide variety of applications in microprocessors, digital signal processors, and dynamic memory due to their high speed and low device count. These dynamic circuits are often favored in high performance designs because of the speed advantage offered over static CMOS logic circuits. In this paper, AND gates with different body

Journal: :CoRR 2018
Vishal Saxena Xinyu Wu Kehan Zhu

Emerging non-volatile memory (NVM), or memristive, devices promise energy-efficient realization of deep learning, when efficiently integrated with mixed-signal integrated circuits on a CMOS substrate. Even though several algorithmic challenges need to be addressed to turn the vision of memristive Neuromorphic Systems-on-a-Chip (NeuSoCs) into reality, issues at the device and circuit interface n...

2017
B. Chakrabarti M. A. Lastras-Montaño G. Adam M. Prezioso B. Hoskins K.-T. Cheng D. B. Strukov

Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore's law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (C...

2005
Shinobu Fujita Keiko Abe Thomas H. Lee

We have proposed a new concept of 3D architecture using four-terminal electrical switches (FES), which can replace CMOS logic without self-organized bottom-up process. Ultra high speed FES can be realized by nanoscale electrical mechanical system based on carbon nanotube. Nonvolatile FES can also be realized by modifying twoterminal nonvolatile memory devices, such as solid electrolyte memory u...

2001
K. Joseph Hass Jack Venbrux Prakash Bhatia

As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltages well under 1 V. Although dramatic power reductions can be achieved using low supply voltages in high performance applications, the increased subthreshold leakage that results when transistor threshold voltages are l...

Journal: :journal of advances in computer research 0
behzad ghanavati department of electrical engineering, college of electrical engineering, mahshahr branch, islamic azad university, mahshahr ,iran

a high accurate and low-voltage analog cmos current divider which operates with a single power supply voltage is designed in 0.18µm cmos standard technology. the proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. the proposed divider is modeled with neural network while tlbo algorithm is used to optimize it. the proposed optimization...

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