This paper presents a low voltage 2.8–11.2GHz CMOS broadband low noise amplifier (LNA) using folded common-gate (CG) topology. The broadband input matching is achieved by adopting CG topology. Bandwidth extension is proposed by inserting an inductor to create a broadband band-pass characteristic with a choke inductor. A folded topology is employed to reduce the supply voltage and thus power con...

In this paper, a 1 V UWB LNA in TSMC 0.13 um CMOS process technology is designed. The power consumption is only 7.6 mW. By employing RLC peaking, high-frequency poles are moved outside of the 3.1-10.6 GHz band of interest, and a flat power gain and an excellent phase linearity are achieved. By applying DC voltage to the bulk of transistors, a low voltage LNA is accomplished. The proposed LNA is...

A 0.1–12GHz Low Noise Amplifier (LNA) with an active balun is proposed for multi-standard applications. In order to realize wideband matching and single-to-differential (S2D) conversion simultaneously, a single-end resistive negative feedback amplifier is adopted as the first stage for input impedance matching, and a novel active balun consisting of common source amplifier and source follower i...

This paper represents a 3.5 GHz narrow band differential LNA novel design for the improvement and reliability in 180μm CMOS technology. A 3.5 GHz proposed LNA designed structure is a fully integrated 3GHz high gain narrow band LNA by using differential cascode technique with modified inductive degenerated topology. The low power high gain, less noise, CMOS LNA is designed for wimax applications...

ELECT A wideband low-noise amplifier (LNA) for long-term evolution applications is presented. A capacitive cross-coupled common-gate in combination with current-bleeding common-source topologies is adopted for wideband input matching, high gain and low noise figure (NF). Inter-cascade inductors are adopted to cancel the inter-stage parasitics, which extend input matching and operational bandwid...

This paper presents a low-power single chip WLAN 802.11a transceiver RFIC for personal communication terminal applications. The 5.2GHz transceiver RFIC is implemented in a 0.5 m SiGe technology with 16 mm die size. It consumes 110/130mA in receive/transmit mode under a 3.3V supply. The receiver path shows a 6.4dB noise figure and a -20dBm IIP3 under a maximal 67dB gain. The transmitter path OIP...

A digital RF receiver front-end employing a DT filter is proposed for application to m-WiMAX & The SAW-less receiver architecture, where the large out-of-band interferer can be rejected selectively by using a scalable frequency response property of FIR filter. In addition to the flexibility of the DT filter, the new non-decimation finite impulse response (NDF) filter can be cascaded to a conven...

A fully integrated CMOS wideband Low Noise Amplifier (LNA) operating over 2.3–7 GHz is designed and fabricated using a 0.18 μm CMOS process. The proposed structure is a common sourcecommon source (CS-CS) cascode amplifier with a coupling capacitor. It realizes both low voltage drop at load resistor (Rload) and high gain over 2.3–7 GHz with simultaneous noise and input matching and low power con...

This work gives a design perspective on low-power and wideband RF-to-Baseband current-reuse receivers (CRR). The proposed CRR architecture shares single supply biasing current among both LNTA baseband circuits to reduce power consumption. discusses topology selection suitable procedure of the low noise transconductance amplifier (LNTA), down-conversion passive-mixer, active-inductor (AI) TIA ci...