High power, broad bandwidth, high linearity, and low noise are among the most important features in amplifier design. The broad-band spatial power-combining technique addresses all these issues by combining the output power of a large quantity of microwave monolithic integrated circuit (MMIC) amplifiers in a broad-band coaxial waveguide environment, while maintaining good linearity and improvin...

A 5GHz low power consumption LNA has been designed here for the receiver front end using 90nm CMOS technology. The ‘current reuse’ technique has been used here to reuse the bias current for two amplifier stages stacked upon each other. An inverter type amplifier acts the second stage to a common source first stage thereby giving a good gain for the amplifier. The gain achieved is around 13dB wi...

We present measurements of the power noise that is due to optical amplification in a laser-diode-pumped Nd:YAG free-space traveling-wave linear amplifier in a master-oscillator-power-amplifier configuration. The quantum noise behavior of the optical amplifier was demonstrated by use of InGaAs photodetectors in a balanced detection configuration, at a total photocurrent of 100 mA and in a freque...

A 1V, 1GHz low noise amplifier (LNA) has been designed and simulated using Spectre simulator in a standard TSMC 0.18um CMOS technology. With low power and noise optimization techniques, the amplifier provides a gain of 24 dB, a noise figure of only 1.2 dB, power dissipation of 14 mW from a 1 V power supply.

In this paper two different Gm-C chopper amplifiers, aimed for signal amplification in implantable devices are presented. The first one is a pre-amplifier for ENG signals that was fabricated in a 1.5 μm technology. Measurements of this amplifier showed input noise of 1.2 nVHz and 2.5 μV offset with a power consumption of 28 mW. The second is a complete amplifier for EEG signals designed in a 0....

This report describes the development of a transimpedance amplifier that takes current as input and gives voltage as output. The amplifier consists of three CMOS amplifier stages in a fed-back configuration, achieving a transimpedance gain over 3 kΩ and a 3-dB bandwidth greater than 2.8 GHz. The amplifier operates with a 1.5 V supply voltage and a power budget of 30 mW.

1 This work was undertaken as the Electronics and Telecommunications Engineering degree Final Project of its two first authors. Abstract The design, implementation and performance tests of an Si LDMOS-Based power amplifier for UHF is presented. The amplifier, conceived for medium power GSM-900 base-station applications, consists of a Class-AB single stage circuit designed for maximum output pow...

We have developed a 100 W class Nd:YAG master oscillator power amplifier system based in part on an end-pumped zigzag slab power amplifier. This amplifier incorporates parasitic oscillation suppression by using roughened edges and achieves a small-signal gain coefficient (g(0)l) of 8.06. We describe a novel technique for suppression of parasitic oscillations using claddings on slab edges that s...

With the advancement of CMOS technology, the trend is to design transceivers using this technology with the aim of achieving full integration and reduced system cost. The power amplifier (PA) being one of the most important blocks of the wireless communication system is no exception. The aim of this work is to provide the study that allow the design of a singleended RF CMOS Class-E power amplif...

This paper describes a power amplifier, employing parallel-connected laterally diffused metal–oxide semiconductor (LDMOS) devices with optimized channel widths and bias offsets to approximate ideal square-law behavior of the overall transconductance in class-AB operation. The proposed method results in a significant linearity improvement over a large dynamic range in comparison to a conventiona...