a digital look-up table adaptive predistortion technique using a six-port receiver for power amplifier linearization is presented. the system is designed in ka-band for a dvb-s2 satellite link. we use a six-port receiver at the linearizationloop in place of classic heterodyne receivers. the six-port receiver is implemented by the use of passive microwavecircuits and detector diodes. this approa...

Background and Objectives: In this paper, a new design strategy was proposed in order to enhance bandwidth and efficiency of power amplifier. Methods: To realize the introduced design strategy, a power amplifier was designed using TSMC CMOS 0.18um technology for operating in the Ka band, i.e. the frequency range of 26.5-40GHz. To design the power amplifier, first a power divider (PD) with a ver...

the graphical technique for nonlinear circuits was described that enable us to optimize circuits to obtain maximum output power, maximum efficiency or minimum intermodulation. according to this method a high power amplifier in the ka band was designed. using a nonlinear model of the transistor, optimum slope for load-line was determined so that maximum power at the output was obtainable, then ...

A digital look-up table adaptive predistortion technique using a six-port receiver for power amplifier linearization is presented. The system is designed in Ka-band for a DVB-S2 satellite link. We use a six-port receiver at the linearizationloop in place of classic heterodyne receivers. The six-port receiver is implemented by the use of passive microwavecircuits and detector diodes. This approa...

a novel low noise trans-impedance amplifier is proposed using low cost 0.18 µm cmos technology. a resistive-capacitive feedback is used to extend the bandwidth of the amplifier. as the structure is inductor less, it is suitable for low cost integrated optical interconnects. in this paper improved particle swarm optimization have applied to determine optimal trans-resistance and noise of propose...

Abstract- A novel low-voltage two-stage operational amplifier employing resistive biasing is presented. This amplifier implements neutralization and correction common mode stability in second stage while employs capacitive dc level shifter and coupling between two stages. The structure reduces the power consumption and increases output voltage swing. The compensation is performed by simple mill...

In this paper, analysis, simulation and design of a distributed amplifier (DA) with 0.13µm CMOS technology in the frequency range of 3-40 GHz is presented. Gain cell is a current reused circuit which is optimum in gain, noise figure, bandwidth and also power dissipation. To improve the noise performance in the frequency range of interest, a T-matching low pass filter LC network which is utilize...

A complete procedure for the design of W-band low noise amplifier in MMIC technology is presented. The design is based on a simultaneously power and noise matched technique. For implementing the method, scalable bilateral transistor model parameters should be first extracted. The model is also used for transmission line utilized in the amplifier circuit. In the presented method, input/output ma...