We outline a hybrid analog-digital scheme for computing with three important features that enable it to scale to systems of large complexity: First, like digital computation, which uses several one-bit precise logical units to collectively compute a precise answer to a computation, the hybrid scheme uses several moderate-precision analog units to collectively compute a precise answer to a compu...

Resistive sensors configured as Wheatstone bridges are primarily used to sense pressure, temperature or loads. An external A/D converter (ADC) and a digitally Programmable Gain Amplifier (PGA) can easily be used to convert the difference voltage from these resistor bridge sensors to usable digital words for manipulation by the microcontroller. When the PGA is used in this system, the other chan...

Partial randomization dynamic element matching (DEM) was recently introduced as a promising DEM technique for low harmonic distortion digital-to-analog conversion. The DEM technique is well suited for applications such as direct digital synthesis in wireless communication systems for which low hardware complexity is essential in addition to low harmonic distortion. Previously reported simulatio...

CMOS active pixel sensors (APS) have performance competitive with charge-coupled device (CCD) technology, and offer advantages in on-chip functionality, system power reduction, cost, and miniaturization. This paper discusses the requirements for CMOS image sensors and their historical development. CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversio...

This paper presents the impact that gain, offset and timing mismatch in time-interleaved analog-to-digital converter (TIADC) have on digital receiver systems. An analysis of the mismatch errors shows the dependency of the different errors from the spectrum of the input signal. A discrete-time TIADC model is derived allowing to simulate the mismatch effects of the individual ADCs. Finally, simul...

Abstract — A mixed-mode inner-product vector processor is presented. It performs high-dimensional matrix-vector multiplication on a fine-grain analog array and has a purely-digital interface. The array incorporates charge-mode analog computational cells and row-parallel analog-to-digital converters (ADC). Each of the cells includes a dynamic storage element and a charge injection device computi...

Studies of advanced space very long baseline interferometry (SVLBI) missions envision data rates as high as 8 Gb/s, but to accomplish such high-rate data transfer from the spacecraft to ground using digital downlinks requires high effective isotropic radiated power (EIRP), as well as complex and substantially advanced modulation and receiving techniques. For these reasons, analog signal transfe...