The power transfer efficiency of energy harvesting systems is strongly dependent on the power conditioning circuits, especially rectifiers. The voltage drop across rectifier and its leakage current can drastically influence the efficiency. The hybrid energy harvesters impose even more severe constraints on the rectifier. The low Vth transistors and bulk regulation technique are used in this wor...

This project aims at using (PD-MCPWM) Phase disposition multi carrier pulse width modulation technique to reduce leakage current in a transformerless cascaded multilevel inverter for PV systems. Advantages of transformerless PV inverter topology is as follows, simple structure, low weight and provides higher efficiency , but however this topology provides a path for the leakage current to flow ...

Temperature-dependent current-voltage measurements combined with conductive atomic force microscopy and analytical modeling have been used to assess possible mechanisms of reverse-bias leakage current flow in Schottky diodes fabricated from GaN and Al0.25Ga0.75N/GaN structures grown by molecular-beam epitaxy. Below 150 K, leakage current is nearly independent of temperature, indicating that con...

A new single-phase transformerless grid-connected PV inverter is presented in this paper. Investigations in transformerless grid-connected PV inverters indicate the existence of the leakage current is directly related to the variable common-mode voltage (CMV), which is presented in detail. On the other hand, in recent years it has become mandatory for the transformerless grid-connected PV inver...

High leakage current in deep-submicrometer regimes is becoming a significant contributor to power dissipation of CMOS circuits as threshold voltage, channel length, and gate oxide thickness are reduced. Consequently, the identification and modeling of different leakage components is very important for estimation and reduction of leakage power, especially for low-power applications. This paper r...

A novel technique for dualthreshold is proposed and examined with inputs and clock signals combination in 65nm dualthreshold footerless domino circuit for reduced leakage current. In this technique a p-type and an n-type leakage controlled transistor (LCTs) are introduced between the pull-up and pull-down network and the gate of one is controlled by the source of the other. A high-threshold tra...

PURPOSE To characterize and eliminate a new type of image artifact in concurrent transcranial magnetic stimulation and functional MRI (TMS-fMRI) caused by small leakage currents originating from the high-voltage capacitors in the TMS stimulator system. MATERIALS AND METHODS The artifacts in echo-planar images (EPI) caused by leakage currents were characterized and quantified in numerical simu...

Image sensors are the core components of computer, communication, and consumer electronic products. Complementary metal oxide semiconductor (CMOS) image sensors have become the mainstay of image-sensing developments, but are prone to leakage current. In this study, we simulate the CMOS image sensor (CIS) film stacking process by finite element analysis. To elucidate the relationship between the...

Minimizations of power dissipation, chip area with higher circuit performance are the necessary and key parameters in deep submicron regime. The leakage current increases sharply in deep submicron regime and directly affected the power dissipation of the logic circuits. In deep submicron region the power dissipation as well as high performance is the crucial concern since increasing importance ...

Prevailing CMOS design practice has been very conservative with regard t o choice of transistor threshold voltage, so as t o avoid the difficult problems of threshold variations and high leakage currclnts. I t is becoming necessary t o scale threshold voltages more aggress~vely in order t o obtain further power reduction, performance improven~ent, and integration density. Substantial leakage re...