Built-in self-test (BiST) for transmitters is a desirable choice since it eliminates the reliance on expensive instrumentation to perform radio-frequency signal analysis. Existing on-chip resources, such as power or envelope detectors or small additional circuitry, can be used for BiST purposes. However, due to limited bandwidth, measurement of complex specifications, such as in-phase and quadr...

A low-power wideband mixer is designed and implemented in 0.13 µm standard CMOS technology based on resistive feedback current-reuse (RFCR) configuration for the application of cognitive radio receiver. The proposed RFCR architecture incorporates an inductive peaking technique to compensate for gain roll-off at high frequency while enhancing the bandwidth. A complementary current-reuse techniqu...

This paper presents the design of a reconfigurable Low-Noise Amplifier (LNA) for the next generation of wireless hand-held devices. The circuit, based on a lumped-approach design and implemented in a 90nm standard RF CMOS technology, consists of a two-stage topology that combines inductive-source degeneration with MOS-varactor based tuning networks and programmable bias currents, in order to ad...

A 1.2-V fully integrated 0.35m inductively degenerated common source CMOS low-noise amplifier has been demonstrated at 2.4 GHz in this paper. A simple common source configuration can be operated at lower voltage and has lower output impedance when compared with a conventional high output impedance cascode LNA circuit topology. The input matching inductance, output matching inductance, and sourc...

A 2-GHz, Continuous-Time Bandpass ∆Σ Analogto-Digital Converter sampled with a 40-GHz clock was implemented in a 130-nm SiGe BiCMOS technology. It achieves an SNDR of 55 dB and 52 dB over 60 MHz and 120 MHz, respectively, and an SFDR of 61 dB with a single-ended IIP3 of +4 dBm. The center frequency is tunable from 1.8-2 GHz. It employs a Gm-LCVAR filter based on a MOS-HBT cascode transconductor...

This paper describes a CMOS analog baseband circuits for directconversion receiver of5GHz IEEE 802.11a. The analog baseband consists of I/Q signal paths which have channel selection filter, programmable gain amplifier (PGA). An active-RC channel selection filter for WLAN is described whose cut-off frequency is tunable from 6MHz to 20MHz. For high linearity, the PGA is constructed with op-amp an...

A full frequency band active RF tracking filter design for a digital TV tuner is implemented for the first time. By combined control of the Gm and C values in the biquad of the Gm-C filter, the proposed tracking bandpass filter satisfies full frequency band tuning while maintaining narrow bandwidth. The Gm cell of the tracking filter is based on a dynamic source degenerated differential pair wi...

A novel low power RF receiver front-end for 3–5 GHz UWB is presented. Designed in the 0.13 μm CMOS process, the direct conversion receiver features a wideband balun-coupled noise cancelling transconductance input stage, followed by quadrature passive mixers and transimpedance loading amplifiers. Measurement results show that the receiver achieves an input return loss below −8.5 dB across the 3....

This paper describes a baseband analog (BBA) chain for wireless local area network (WLAN) applications. For the given specifications of the receiver BBA chain, the optimum allocation of the gain and filter rejection of each block in a BBA chain is achieved to maximize the SFDR. The fully integrated BBA chain is fabricated in 0.13 μm CMOS technology. An input-referred third-order intercept point...

In this paper a 3.5 GHz down conversion mixer with 20 MHz IF output signal for location-fixed WiMAX systems is presented. The proposed mixer is implemented with TSMC 0.18μm RF CMOS technology with 1.5V supply voltage which utilizes Current-Bleeding and Current-Reuse techniques to improve noise figure and conversion gain of conventional Gilbert-type structure. This mixer achieves 12 dB of conver...