An all-optical non-inverted parity generator and checker based on semiconductor optical amplifiers (SOAs) are proposed with four-wave mixing (FWM) cross-gain modulation (XGM) non-linear effects. A 2-bit using by exclusive NOR (XNOR) OR (XOR) gates implemented first SOA second 10 Gb/s return-to-zero (RZ) code, respectively. The check bits provided adjusting the center wavelength of tunable bandp...

Hardware acceleration in digital signal processing (DSP) domain proved as the best implementation strategy. Overall performance of DSP processor accelerates by using the hardware module named as DSP accelerator by performing certain functions in the accelerator. In some areas such as video processing, flexible DSP accelerator is used to do video encoding and decoding flexibly. The architecture ...

Nowadays, reversible logic is one of the most important issue which has emerged as a promising technology having its applications in low power CMOS, quantum computing, nanotechnology and optical computing. Reversible logic circuits give less power dissipation as well as distinct output that is assigned for each distinct input. The classical set of gates such as the NAND, AND, NOR, OR, XOR and X...

Spintronics is one of the emerging fields for next-generation low power, high endurance, non-volatile, and area efficient memory technology. Spin torque transfer (STT), spin orbit (SOT), electric field assisted switching mechanisms have been used to switch magnetization in various spintronic devices. However, their operation speed fundamentally limited by precession time that typically ranges 1...

In comparison to the conventional complementary pull-up and pull-down logic structure, pass transistor (PTL) family reduces number of transistors required perform functions, thereby reducing both area power consumption. However, this requires inter-stage inverters ensure signal integrity in cascaded circuits, must be used provide each logical input its form. These signals increase device count ...

Deep neural networks (DNNs) have attracted significant attention for their excellent accuracy especially in areas such as computer vision and artificial intelligence. To enhance their performance, technologies for their hardware acceleration are being studied. FPGA technology is a promising choice for hardware acceleration, given its low power consumption and high flexibility which makes it sui...

In this paper an extensive study on several adders has been manifested to design VLSI applications. Adder circuits plays a major role to modify or design a multiplier. Imprecise adder is one of the design where used in increasing the performance and power efficiency and approximate adders are for error detection and correction.16T full adders is also used to fast and energy efficient adder. An ...

This paper presents comparative study of high-speed, low-power and low voltage full adder circuits. Our approach is based on XOR-XNOR design full adder circuits in a single unit. A low power and high performance 9T full adder cell using a design style called “XOR (3T)” is discussed. The designed circuit commands a high degree of regularity and symmetric higher density than the conventional CMOS...

We present a dynamic learning paradigm for " programming " a general quantum computer. A learning algorithm is used to find the control parameters for a coupled qubit system, such that the system at an initial time evolves to a state in which a given measurement corresponds to the desired operation. This can be thought of as a quantum neural network. We first apply the method to a system of two...