Core based design has become the de-facto design style for many VLSI design houses, as it facilitates design reuse, import of specialized expertise from external vendors and leads to a more streamlined design flow. Pre-designed cores and reusable modules are popularly used in the design of large and complex Systems-on-aChip (SOC). Embedded cores such as processors, custom application-specific i...

The DFT and Test challenges faced, and the solutions applied, to the ARM1026EJ microprocessor core are described in this paper. New DFT techniques have been created to address the challenges of distributing a DFT core solution that will ultimately end up in many different environments. This core was instantiated into a test chip. The new DFT features were utilized successfully in the SoC.

We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition probabilities (profiles) at the inputs of circuits with full-scan using testability metrics based on the targeted fault model. We use a genetic algorithm (GA) based search procedure to determine optimal profiles. We use ...

Intellectual property cores pose a signifcant test challenge. The core supplier may not give any information about the internal logic of the core, but simply provide a set of test vectors for the core which guarantees a particular fault coverage. If the core is embedded within a larger design, then the problem is how to apply the specified test vectors to the core and how to test the userdefine...

conclusions hepatitis b core antibody immunoglobulin m positivity is different in healthy blood donors of different countries according to the prevalence of chronic hepatitis b and its vaccination. based on the current study findings, all positive samples of hepatitis b core antibody in iranian blood banks should be considered as candidates for occult hepatitis b not just the window period infe...