We have developed a simple method adopting double-patterning technique to extend the I-line stepper limit for the sub-100 nm poly-Si pattern generation in this work. Through in-line and cross-sectional scanned electron microscopic analyses of the generated patterns, we confirmed the feasibility of the double-patterning technique for the fabrication of nano-scale devices. Resolution capability o...

In this work, a decoder based demultiplexer is designed using DG MOSFET and its functional behavior is analyzed along with the characteristics of the device. Equivalent circuit method is followed in this work, which is very significant in analyzing the characteristics and performance of the dual gate metal oxide semiconductor field effect transistor. The maximum drain current obtained is 40 mA ...

Metal oxide semiconductor field-effect transistors, formed using silicon dioxide and silicon, have undergone four decades of staggering technological advancement. With fundamental limits to this technology close at hand, alternatives to silicon dioxide are being pursued to enable new functionality and device architectures. We achieved ferroelectric functionality in intimate contact with silicon...

Realization of chip-based all-optical and optoelectronic computational networks will require ultracompact Si-compatible modulators, ideally comprising dimensions, materials, and functionality similar to electronic complementary metal-oxide-semiconductor (CMOS) components. Here we demonstrate such a modulator, based on field-effect modulation of plasmon waveguide modes in a MOS geometry. Near-in...

High speed and low power consumption are vital in ICs for high-speed optical communications systems. Some of the competing IC elements in this field include: Si-BJT (Silicon Bipolar Transistor), Si-CMOS (Silicon Field Effect Transistor), SiGe-BJT (Silicon Germanium Bipolar Transistor), GaAs-HBT (Gallium Arsenide Heterobipolar Transistor), GaAs-FET (Gallium Arsenide Field Effect Transistor), and...

This paper reviews the basic circuit issues of silicon-on-insulator (SOI) technology for metal-oxide-semiconductor (CMOS) circuits. The superior features of SOI in low power, high speed, high device density and the effect of floating body particularly in partial depletion (PD) SOI device are addressed. Analog and RF circuits are considered and their performances are compared with those reported...

Introduction Scaling and integration of complementary metaloxide-semiconductor devices have made great development in the pursuit of higher performance and lower power consumption. Elemental devices of field effect transistors have been going through a transition from planar to three-dimensional structures for overcoming the physical limitation of thickness for the gate insulator. However, due ...

A spin metal-oxide-semiconductor field-effect transistor spin MOSFET , which combines a Schottky-barrier MOSFET with ferromagnetic source and drain contacts, is a promising device for spintronic logic. Previous simulation studies predict that this device should display a very high magnetoresistance MR ratio between the cases of parallel and antiparallel magnetizations for the case of half-metal...

We propose and demonstrate the operation of a monolithic field-effect-transistor-amplified magnetic field sensor device, in which a tunnel-magnetoresistive ~TMR! material is incorporated within the gate of a Si metal–oxide–semiconductor–field-effect transistor. A fixed voltage is applied across the TMR layer, which leads charge to build up within the gate. Applying or changing an external magne...