Since the clock power consumption in today’s processors is considerably large, reducing the clock power consumption contributes to the reduction of the total power consumption in the processors. Recently, a gated flip-flop is proposed for reducing the clock power consumption of flip-flop circuits. The gated flip-flop employs a clock-gating circuit which cuts off an internal clock signal if the ...

Flip-flops are critical timing elements in digital circuits which have a large impact on circuit speed and power consumption in VLSI circuits. In this paper, a dualedge triggered flip-flop with high performance and clock gated sense amplifier flip-flop is designed. Moreover, the pulse generator can be shared among many flip-flops to reduce the power dissipation and chip area. By incorporating t...

Lipids of the plasma membrane are distributed asymmetrically between two leaflets, and the presence of glycerophospholipids and sphingolipids contribute to this asymmetry (Fig. 1). Of the glycerophospholipids, phosphatidylcholine (PC) is located mainly in the outer (extracytosolic) leaflet, and the aminophospholipids phosphatidylserine (PS) and phosphatidylethanolamine (PE), as well as minor li...

We prove a generalization of Orlov's projectivization formula for the derived category Dcohb(P(E)), where E does not need to be vector bundle; Instead, is coherent sheaf which locally admits two-step resolutions. As special case, this also gives generalized universal hyperplane section formula. applications, (i) we obtain blowup along codimension two Cohen-Macaulay subschemes, (ii) new “flop-fl...

During apoptosis, phosphatidylserine (PS) is moved from the plasma membrane inner leaflet to the outer leaflet where it triggers recognition and phagocytosis of the apoptotic cell. Although the mechanisms of PS appearance during apoptosis are not well understood, it is thought that declining activity of the aminophospholipid translocase and calcium-mediated, nonspecific flip-flop of phospholipi...

complies with the regulations of the University and meets the accepted standards with respect to originality and quality. In this thesis we propose a set of independent techniques in the overall concept of LC resonant clocking where each technique reduces power consumption and improve system performance. Low-power design is becoming a crucial design objective due to the growing demand on portab...

i ABSTRACT Radiation hardening by design (RHBD) has become a necessary practice when creating circuits to operate within radiated environments. While employing RHBD techniques has tradeoffs between size, speed and power, novel designs help to minimize these penalties. Space radiation is the primary source of radiation errors in circuits and two types of single event effects, single event upsets...

D flip flop is one of the fundamental building blocks in most digital designs. Many high speed digital circuits such as memory require high speed and low power consumption. In existing method, the charge keeper is used to provide strong 0 and strong 1 since it uses pass transistor for signal feed through technique. A new D Flip Flop is proposed with signal feed through technique using transmiss...

Digital circuit design is streamlined process used to improve the performance of a circuit for a particular application. Fast speed, minimum power dissipation and less area are the desirable characteristics of a digital circuit, in general. To meet a particular standard of speed, a compromise in power dissipation and speed is required. Timing elements such as Flip-flop are used as clock generat...