In this paper, we hypothesize that reconfigurable computing is not more widely used because of the logistical difficulties caused by the close coupling of applications and hardware platforms. As an alternative, we propose computing machines that use a single, serial instruction representation for the entire reconfigurable computing application. We show how it is possible to convert, at runtime,...

today, one of the biggest problems that gripped the banking sphere, the high cost of implementing advanced technologies and the efficient use of the hardware. cloud computing is the use of shared services on the internet provides a large role in developing the banking system, without the need for operating expenses including staffing, equipment, hardware and software reducing the cost of implem...

In this work, the design of a low-cost, field programmable gate array (FPGA)-based digital hardware platform that implements image processing algorithms for real-time distance measurement is presented. Using embedded development kit (EDK) tools from Xilinx, the system is developed on a spartan3 / xc3s400, one of the common and low cost field programmable gate arrays from the Xilinx Spartan fami...

The evolution of today's application technologies requires a certain level of robustness, reliability and ease of integration. We choose the Fields Programmable Gate Array (FPGA) hardware description language to implement the facial recognition algorithm based on "Eigen faces" using Principal Component Analysis. In this paper, we first present an overview of the PCA used for facial recognition,...

This paper presents the VHDL implementation of fault tolerant cellular genetic algorithm. The goal of paper is to harden the hardware implementation of the cGA against single error upset (SEU), when affecting the fitness registers in the target hardware. The proposed approach, consists of two phases; Error monitoring and error recovery. Using innovative connectivity between processing elements ...

this paper mainly focused on implementation of aes encryption and decryption standard aes-128. all the transformations of both encryption and decryption are simulated using an iterativedesign approach in order to minimize the hardware consumption. this method can make it avery low-complex architecture, especially in saving the hardware resource in implementing theaes inversesub bytes module and...

one of the most important parts of range doppler algorithm is range cell migration correction. in this part, an interpolation approach is used to estimate data in their correct location. the interpolation method has a great influence on the quality of ultimate image. in this paper the interpolation method and different ways for increasing its accuracy was discussed. the performance of different...