In this paper, two dielectric layers of Al2O3 and Gd2O3 were prepared by an atomic layer deposition (ALD) magnetron sputtering (SD), respectively. Based on this, a metal-oxide-semiconductor field-effect transistor (MOSFET) was successfully hydrogen-terminated single-crystal diamond (H-diamond), its related properties studied. The results showed that device had typical p-type channel MOSFET outp...

The relationship of the biasing condition and the self-heating effect of a multi-channel metallic oxide semiconductor field effect transistor (MOSFET) device was examined using various channel currents ranging from triode to saturation regimes. When temperature non-uniformity is generated due to transistor self-heating, the local thermal resistance is conventionally defined through the differen...

Deep submicron strained-Si n-MOSFET’s were fabricated on strained Si/relaxed Si0 8Ge0 2 heterostructures. Epitaxial layer structures were designed to yield well-matched channel doping profiles after processing, allowing comparison of strained and unstrained Si surface channel devices. In spite of the high substrate doping and high vertical fields, the MOSFET mobility of the strained-Si devices ...

Study of gate length dependent effective velocity manifests the velocity overshoot effects in MOSFETs. Effective velocity of holes in control Si, S i ~ . s G e ~ . ~ and Sio.793Geo,2Co.oo7 devices with different channel lengths are shown in Fig. 2. As channel length decreases, vef increases in every device. In the case of the 0.8 pm device, the effective hole velocity of Sio.793Ge0.2C0.007 is e...

A power VDMOSFET has been simulated using PISCES-II, a 2-D numerical device simulator. The doping densities and device dimensions are chosen so as to simulate a typical device structure with one micron channel length. These simulations are aimed at understanding the device physics through various internal electrical quantities like potential distribution, electric field distribution, and electr...

The potential performance of implant free heterostructure In0 3Ga0 7As channel MOSFETs with gate lengths of 30, 20, and 15 nm is investigated using state-of-the-art Monte Carlo (MC) device simulations. The simulations are carefully calibrated against the electron mobility and sheet density measured on fabricated III-V MOSFET structures with a highdielectric. The MC simulations show that the 30 ...

The phenomenal success of CMOS technology, and, then the progress of the information technology, can be attributed without any doubt to the scaling of the MOS transistor, which has been pushed during more than thirty years to increasingly levels of integration and per‐ formances. Then, MOSFETs have been fabricated always smaller, denser, faster and cheaper in order to provide ever more powerful...

Abstract: Currently, the auxiliary converter in the auxiliary power supply system of a modern tram adopts Si IGBT as its switching device and with the 1700 V/225 A SiC MOSFET module commercially available from Cree, an auxiliary converter using all SiC devices is now possible. A SiC auxiliary converter prototype is developed during this study. The author(s) derive the loss calculation formula o...

Recently analog circuit designers are interested in structured optimization techniques to automate the process of CMOS circuit design. Geometric programming, which makes use of monomial and posynomial expressions to model MOSFET parameters, represents one such approach. The extent of accuracy in finding a global optimal solution using this approach depends on the formulation of circuit and devi...

449 Abstract— We have analyzed channel doping and dimensions(channel length, width and thickness) for the optimum subthreshold characteristics of DG(Double Gate) MOSFET based on the model of MicroTec 4.0. Since the DGMOSFET is the candidate device to shrink short channel effects, the determination of design rule for DGMOSFET is very important to develop sub-100nm devices for high speed and low ...