Process variation has recently emerged as a major concern in the design of circuits including interconnect in current nanometer regime. Process variation leads to uncertainties of circuit performances such as propagation delay. The performance of VLSI/ULSI chip is becoming less predictable as MOSFET channel dimensions shrinks to nanometer scale. The reduced predictability can be ascribed to poo...

Dolenec, Z.: Intraspecific nest parasitism in the starling (Sturnus vulgaris) in northwestern Croatia. Nat. Croat., Vol. 10, No. 4., 315–320, 2001, Zagreb. This study reports intraspecific nest parasitism in starlings (Sturnus vulgaris) in the village of Mokrice, northwestern Croatia, in 1999 and 2000. Twenty one (30.5%) out of 70 observed nests during the two years contained one or two parasit...

There are two dynamics issues in vision chips: (i) The temporal dynamics issue due to the parasitic capacitors in a CMOS chip, and (ii) the spatial dynamics issue due to the regular array of processing elements in a chip. These issues are discussed in [1]–[3] for the resistor network with only associated parasitic capacitances. However, in this paper we consider also parasitic inductances as we...

The realization of collector-up light-emitting complementary charge injection transistors is reported. The devices have been implemented in molecular-beam-epitaxy-grown n-InGaAs/ InAlAs/p-InGaAs and n-InGaAs/InP/p-InGaAs heterostructures using a self-aligned process for the collector stripe definition. Electrons, injected over the wide-gap heterostructure barrier (InAlAs or InP) by the real-spa...

We developed a double-recess etching process and a new Digital-Oxide-Deposition (DOD) technique to fabricate 180nm low-threshold GaN Metal-OxideSemiconductor Double Heterostructure Field Effect Transistors (MOS-DHFET). Two device layer structures, InGaN channel design and InGaN back-barrier design, were employed to improve the confinement of TwoDimensional Electron Gas (2DEG) and mitigate the s...

Article history: Received 24 January 2008 Received in revised form 13 August 2008 Available online 1 October 2008 0026-2714/$ see front matter 2008 Elsevier Ltd. A doi:10.1016/j.microrel.2008.08.002 * Corresponding author. Tel.: +886 6 2080398; fax: E-mail addresses: [email protected] edu.tw (Y.-K. Fang). This paper reports to improve performances of sub-90 nm CMOSFETs with a notch-gat...