Weed plants characteristic for potato and hop fields have not been considered in the past as potential hosts that could transmit and lead to spreading of potato spindle tuber (PSTVd) and hop stunt (HSVd) viroids, respectively. To gain insight into this problem, we biolistically inoculated these weed plants with viroid populations either as RNA or as cDNA. New potential viroid host species, coll...

AIM/BACKGROUND The development of resistance to synthetic drugs by target organisms is a major challenge facing medicine, yet locked within plants are phytochemicals used in herbal medicine (especially in the Arabian Peninsula) that may find application in this regard. In pursuit of unlocking these "hidden treasures," the methanol extracts of leaves, aerial parts, fruits, and resins of 17 plant...

With large-capacity FPGAs, such as the Xilinx Virtex family, complex systems can now be constructed from reconfigurable hardware, and sophisticated designs are more easily implemented through C-language hardware compilers, such as Handel-C [1]. However, improved language support is not enough, as effective system design needs structured methods and high-level design support, which a language by...

In this paper we present a design case study using Handel-C—a recently developed programming language for compilation of high-level programs directly into FPGA hardware. The design is an 8-bit RISC microcontroller core with 33 instructions, prescaler and a programmable timer. Handel-C was used throughout the entire design and debugging flow. The RISC microcontroller design was implemented in on...

We present tools that convert a subset of CSP into Handel-C code. Handel-C was derived from the original occam concurrency language, but has a syntax similar to the standard C programming language. It compiles to produce files to program an FPGA. We thus now have a process that can directly generate hardware from a verified high-level description. The CSP to Handel-C translator makes use of the...

In this paper, we present the design optimization of oneand two-dimensional fullypipelined computing structures for area-delaypower-efficient implementation of finite impulse response (FIR) filter by systolic decomposition of distributed arithmetic (DA)based inner-product computation. The systolic decomposition scheme is found to offer a flexible choice of the address length of the lookup-table...