Temporal logic is widely used for specifying hardware and software systems. Typically two types of properties are distinguished, safety and liveness properties. While safety can easily be checked by reachability analysis, and many efficient checkers for safety properties exist, more sophisticated algorithms have always been considered to be necessary for checking liveness. In this paper we desc...

In this paper we propose a general framework for distributed statistical model checking of networks of priced timed automata. The first contribution is a new algorithm to distribute sequential hypothesis testing without introducing bias in the results. The second contribution is an implementation of this algorithm in Uppaal. The major contribution is an experimental and analytical evaluation of...

Ontology formal model and ontology checking recently are still under hot discussion. In this paper, an ontology concept model is constructed using Description Logics. Based on model, the issue on Consistency checking of the extended ontology model is studied with the conclusion that the four kinds of term checking, including term satisfiability checking, term subsumption checking, term equivale...

Abstract Ultimate Taipan integrates trace abstraction with algebraic program analysis on path programs. supports data race checking in concurrent programs through a reduction to reachability checking. Though the subsequent verification is not tuned for checking, results are encouraging.

Module checking has been introduced in late 1990s to verify open systems, i.e., systems whose behavior depends on the continuous interaction with the environment. Classically, module checking has been investigated with respect to specifications given as CTL and CTL∗ formulas. Recently, it has been shown that CTL (resp., CTL∗) module checking offers a distinctly different perspective from the be...