DC testing of parametric faults in non-linear analog circuits based on a new transformation, entitled, V-Transform acting on polynomial coefficient expansion of the circuit function is presented. VTransform serves the dual purpose of monotonizing polynomial coefficients of circuit function expansion and increasing the sensitivity of these coefficients to circuit parameters. The sensitivity of V...

As a typical example of large and complex mechanical systems, rotating machinery is prone to diversified sorts of mechanical faults. Among these faults, one of the prominent causes of malfunction is generated in gear transmission chains. Although they can be collected via vibration signals, the fault signatures are always submerged in overwhelming interfering contents. Therefore, identifying th...

A new fault tolerant architecture that provides tolerance to a broad scope of hardware, software, and communications faults is being developed. This architecture relies on widely commercially available operating systems, local area networks, and software standards. Thus, development time is significantly shortened, and modularity allows for continuous and inexpensive system enhancement througho...

This publication presents the development of integrity monitoring and fault detection exclusion (FDE) pseudorange measurements, which are used to aid a tightly-coupled navigation filter. filter is based on an inertial measurement unit (IMU) aided by signals global satellite system (GNSS). Particularly, GNSS include positioning (GPS) Galileo. By using signals, systems suffer from signal interfer...

This paper proposes a method of eliminating common-mode voltage (CMV) and shaft in dual three-phase motors using the carrier phase shift space vector pulse width modulation (SVPWM). SVPWM for motor is simply implemented two traditional structures. The representative work study to eliminate by applying due cancellation CMV. It was verified that proposed could reduce with simple technique, rather...

Several existing distributed le systems provide reliability by server replication. An alternative approach is to use dual-ported disks accessible to a server and a backup. We compare the two approaches by examining an example of each. Deceit is a replicated le server that emphasizes exibility. HA-NFS is an example of the second approach that emphasizes e ciency and simplicity. The two le server...

Self-checking circuits detect (at least some of) their own faults. We describe self-timed circuits, including combinational logic and sequential machines, which either halt or generate illegal output if they include any single stuck-at faults. The self-timed circuits employ dual rail data encoding to implement ternary logic of 0, 1, and unde f ined states; the fourth state is used to signal ill...

In this paper, we introduce a method that uses the field programmable gate array (FPGA)-based emulation system for fault grading. The real-time simulation capability of a hardware emulator could significantly improve the performance of fault grading, which is one of the most time-consuming tasks in the circuit design and test process. We employ a serial fault emulation algorithm enhanced by two...