In this paper, we introduce the design of an advanced high-performance interconnect architecture for supercomputers. first part consider generation Angara (Angara G1). The is based on router ASIC, which supports a 4D torus topology, deterministic and adaptive routing, has hardware support RDMA technology. interface with processor unit PCI Express. G1 extremely low communication latency 850 ns u...

Cryptographic algorithms are more eeciently implemented in custom hardware than in software running on general-purpose processors. However, systems which use hardware implementations have significant drawbacks: they are unable to respond to aws discovered in the implemented algorithm or to changes in standards. In this paper we show how reconngurable computing ooers high performance yet exible ...

JPEG2000 is an upcoming compression standard for still images that has a feature set well tuned for diverse data dissemination. These features are possible due to adaptation of the discrete wavelet transform, intra-subband bit-plane coding, and binary arithmetic coding in the standard. In this paper, we propose a system-level architecture capable of encoding and decoding the JPEG2000 core algor...