نتایج جستجو برای: memory protocol

تعداد نتایج: 500200  

Introduction and purpose: Physical inactivity is an important risk factor for cognitive decline in ageing and for Alzheimer’s disease. The aim of this study was to investigate The effect of Aerobic in water and Exercises in water on working memory in elderly women with Alzheimer's disease. Material and Methods: This study was a quasi-experimental study. The statistical community consiste...

Journal: :IEEE Trans. Parallel Distrib. Syst. 2002
Daniel J. Sorin Manoj Plakal Anne Condon Mark D. Hill Milo M. K. Martin David A. Wood

ÐIn this paper, we develop a specification methodology that documents and specifies a cache coherence protocol in eight tables: the states, events, actions, and transitions of the cache and memory controllers. We then use this methodology to specify a detailed, modern three-state broadcast snooping protocol with an unordered data network and an ordered address network that allows arbitrary skew...

Objectives: This study investigated the effect of acute resistance exercise on brain-derived neurotrophic factor (BDNF), Insulin-like growth factor-1 (IGF-1) and Insulin-like growth factor binding protein-3 (IGFBP-3) in the elderly. Methods & Materials: 22 healthy older men participated in this study (mean age of 60-75 years old). 72 hours after the determination of muscular maximal strength...

1999
Benny Wang-Leung Cheung Cho-Li Wang Kai Hwang

The performance of a software Distributed Shared Memory relies on an efficient memory consistency model, and a suitable protocol for implementing the model. This paper studies a new concept of a migrating-home protocol for implementing the scope consistency model. In this protocol, the home, which is the location of the most up-to-date copy of each memory page, can change among processors. We i...

1999
Kenji Morimoto Kei Hiraki

This thesis describes a high-performance implementation of the Message Passing Interface (MPI) library based on a shared memory communication mechanism. Our implementation, called MPI/MBCF, combines two protocols to utilize the shared memory communication mechanism: the write protocol and the eager protocol. In the write protocol, Remote Write is used for communication with no bu ering. In the ...

Amin Raji Zadeh, Khadijeh Esmaeilpour, Vahid Sheibani,

Introduction: Sleep disorders are common problems in modern societies affecting different aspects of individuals' lives. Many studies have reported that sleep deprivation (SD) leads to impairments in hippocampus-dependent learning and memory formations. Physical exercise has been shown to improve learning and memory. The objective of the current study was to investigate the effects of Voluntary...

1994
Craig Anderson

Parallel applications exhibit a wide variety of memory reference patterns. Designing a memory architecture that serves all applications well is not easy. However, because tolerating or reducing memory latency is a priority in e ective parallel processing, it is important to explore new techniques to reduce memory tra c. In this paper, we describe a snoopy cache coherence protocol that uses a la...

Journal: :IEICE Transactions 2004
Inseon Lee Heon Young Yeom Taesoon Park

Distributed database systems require a commit process to preserve the ACID property of transactions executed on a number of system sites. With the appearance of main memory database system, the database processing time has been reduced in the order of magnitude, since the database access does not incur any disk access at all. However, when it comes to distributed main memory database systems, t...

1997
Colette Johnen Gianluigi Alari Joffroy Beauquier Ajoy Kumar Datta

We present a deterministic distributed depth rst token passing protocol on a rooted network This protocol does not use either the processor identi ers or the size of the network but as sumes the existence of a distinguished processor called the root of the network The protocol is self stabilizing meaning that starting from an arbitrary state in response to an arbitrary perturbation modifying th...

Journal: :International Journal of Electrical and Computer Engineering 2021

In modern techniques of building processors, manufactures using more than one processor in the integrated circuit (chip) and each called a core. The new chips processors multi-core processor. This design makes to work simultanously for job or all cores working parallel same job. All are similar their design, core has its own cache memory, while shares main memory. So if requestes block data fro...

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