In this paper, we investigate the ever-increasing power issue that is poised to jeopardize performance and robustness of future low-power microprocessor design. We have observed a tremendous amount research in clock network design bolster energy-efficient computing, without, however, any substantial improvement overall performance. work, used emerging ferroelectric negative capacitance field-ef...

Energy-awareness is an important design criterion for many mobile real-time applications such as phones, handhelds or cars. Normally, high-computing power excludes low electrical power consumption. However, with the two methods of space-sharing and adaptive clocking that are proposed in this paper, both can be reconciled. Space-sharing is an alternative design methodology for embedded systems t...

We present a novel hybrid CMOS-MQCA architecture using multi-layer Spintronic devices as computing elements. A feasibility study is presented with 22nm CMOS where new approaches for spin transfer torque induced clocking and readout scheme for variability-tolerance are introduced. A firstof-its-kind Spintronic device model enables circuit simulation using existing CAD infrastructure. Approximate...

complies with the regulations of the University and meets the accepted standards with respect to originality and quality. In this thesis we propose a set of independent techniques in the overall concept of LC resonant clocking where each technique reduces power consumption and improve system performance. Low-power design is becoming a crucial design objective due to the growing demand on portab...

In this paper we introduce and characterize a novel circuit design for low power clock distribution for quantumdot cellular automata (QCA) systems. The characterization of the clocking circuitry includes an evaluation of: the coupling capacitances among the wires and with the ground plane; the dissipative effects of the wires and the substrate; the phase shift between neighboring wires; and the...