A high DC-gain low-power current recycling amplifier using positive-feedback technique is presented. In the proposed amplifier, the positive-feedback signal used to enhance the DC-gain is derived from the extra nodes created by cascoding. Positive-feedback offers the ability of obtaining a very high DC-gain, ideally infinite gain, without affecting high frequency performance and stability. Unde...

A high-gain wide-bandwidth three-stage amplifier, which employs dual-miller compensation with nulling-resistor and dual-feedforward compensation (DMCNR-DFC), is designed and analyzed in this paper. By adopting the technique of DMCNR-DFC, the designed three-stage amplifier achieves well performance including gain-bandwidth product (GBW) and slew rate (SR). The improved DMCNR-DFC three-stage ampl...

High gain amplifiers with fast settling times are needed for high-speed data converter applications. A cascaded amplifier architecture is discussed that can make use of several architecturally identical amplifies to achieve the desired gain. Only one of the amplifiers has a gainbandwidth product requirement that is modestly higher than the rest to keep the overall structure stable in the presen...

in this paper, we investigate the parameters affecting total harmonic distortion (thd) and power supply rejection ratio (psrr) in pwm class d amplifiers (cdas) on the basis of linear models with feedback. from our mathematical analysis, we show that the thd of a pwm class d amplifier with feedback can be improved by increasing the gain of the integrator through adding another amplifier at the o...

this paper proposes a low voltage (±0.55v supply voltage) low power (44.65µw) high common mode rejection ratio (cmrr) differential amplifier (d.a.) with rail to rail input common mode range (icmr), constant transconductance (gm) and enhanced frequency performance. its high performance is obtained using a simple negative averaging method so that it cancels out the common mode input signals at th...

In this paper, a detailed model of a hybrid dual-stage Raman/erbium-doped fiber (EDF) amplifier is presented. This model takes into account the impact of double Rayleigh backscattering (DRB) noise, amplified spontaneous emission (ASE) noise and Kerr-nonlinearity induced impairments in the amplification process. Using this model, we present a comprehensive analysis of the operation of hybrid dua...

It is practically not feasible to measure the open-loop voltage gain of the operational amplifier in the open loop configuration. It is because the open-loop voltage gain of the operational amplifier is very large. In order to avoid the saturation of the output voltage, a very small input should be given to operational amplifier which is not possible to be measured practically by a digital mult...

A 220GHz solid-state power amplifier MMIC is presented, simultaneously demonstrating 55.5mW output power Pout at 17.0dB compressed gain (1.12mW Pin). The maximum saturated Pout is 60mW at 14.0dB compressed gain (2.36mW Pin). This 3-stage, 4-cell amplifier has 26.8dB S21 gain at 220GHz, with 3-dB small-signal bandwidth from at least 210GHz to 235GHz. PDC is 3.38W. Amplifier cells were fabricated...

In this paper we design the low-power CMOS limiting amplifier using negative impedance, the purpose of using negative impedance is to increase the gain of the amplifier. low-power operations are also done using all the active elements. The LA was implemented in a standard CMOS 0.18um technology. This limiting amplifier is designed for the instrumentation(bio-medical) application. Gain of the am...