Introduction: A wide tuning range for a PLL can be achieved by incorporating a frequency-locked loop (FLL) in parallel with the PLL. The key building block of an FLL is the frequency detector (FD) that determines the difference between the oscillator’s divided clock (CKV) and the reference clock (REF). There are many ways to accomplish frequency lock in digital PLLs, but all of them suffer from...

A highly-integrated optical phase-locked loop with a phase/frequency detector and a single-sideband mixer (SSBM) has been proposed and demonstrated for the first time. A photonic integrated circuit (PIC) has been designed, fabricated and tested, together with an electronic IC (EIC). The PIC integrates a widely-tunable sampled-grating distributed-Bragg-reflector laser, an optical 90 degree hybri...

SUMMARY This paper presents a standard cell-based frequency synthesizer with dynamic frequency counting (DFC) for multiplying input reference frequency by N times. The dynamic frequency counting loop uses variable time period to estimate and tune the frequency of digitally-controlled oscillator (DCO) which enhances frequency detection's resolution and loop stability. Two ripple counters serve a...

The LIGO (Laser interferometer Gravitational-wave Observatory) detector [1] is a complex Fabry-Perot/Michelson interferometer designed to detect gravitational waves (GW) from astrophysical sources (Fig. 1). When a GW strikes the detector, the underlying space will be extended in one direction and contracted in the orthogonal direction. The LIGO detector is designed to detect this space-strain a...

This paper presents a fully integrated multi-band frequency-synthesizer architecture. The synthesizer is a ∆Σ based fractional-N frequency synthesizer with three on-chip LC tuned VCOs to cover the entire frequency bands specified in IEEE802.11b, and 802.11a WLAN standards. The synthesizer includes a ∆Σ noise shaper, a dead-zone-free phase frequency detector and a fully differential charge pump....

A phase-locked-loop (PLL)-based frequency synthesizer incorporating a phase detector that operates on a windowing technique eliminates the need for a frequency divider. This new loop architecture is applied to generate the 1.573-GHz local oscillator (LO) for a Global Positioning System receiver. The LO circuits in the locked mode consume only 36 mW of the total 115-mW receiver power, as a resul...

This thesis consists of six publications and an overview of the research topic, which is also a summary of the work. The research described in this thesis concentrates on the design of phase-locked loop radio frequency synthesizers for wireless applications. In particular, the focus is on the implementation of the prescaler, the phase detector, and the chargepump. This work reviews the requirem...