FPGA structures are widely used as they enable early time-to-market and reduced non-recurring engineering costs in comparison to ASIC designs. Interconnections play a crucial role in modern FPGAs, because they dominate delay, power and area. Multiple-valued logic allows the reduction of the number of interconnections in the circuit, hence can serve as a mean to effectively curtail the impact of...

ion, 7antecedent, 21assertions, 21, 22, 27B, 10BDDs, 3Benchmark 11STE, 36Benchmark 17STE, 38Benchmark 20STE, 50Benchmark 21STE, 42Benchmark 22STE, 46Benchmark 7STE, 54bilattice, 10bottom elementmodel, 9truth domain, 10branching time, 10C, 19circuit model, 19compositional rules, 28conjunction, 31<...

Ternary logic is MVL compliant. However, only three logic states are used “0”, “1” and “2”. The optimum radix (r) of a fractional number is found to be the natural logarithm (e). Ternary logic uses number representation with r=3, compared to quaternary logic which uses r=4, hence the most economical integer radix which is the closest to the natural logarithm e, is base 3 [3]. This special prope...

This article presents energy-efficient quaternary minimum and maximum logic circuits based on carbon nanotube field-effect transistor (CNTFET). The specific features of CNTFET, such as the possibility of determining the desired threshold voltages which are obtained by acquiring suitable diameters for carbon nanotubes, facilitate designing efficient circuits with multiple threshold voltages. The...

We study ultrafast operation of multiple-valued quantizers composed of resonant-tunneling diodes (RTDs) and high electron mobility transistors (HEMTs). The operation principle of these quantizers is based on the monostable-multistable transition logic (MML) of series-connected RTDs. The quantizers are fabricated by monolithically integrating InP-based RTDs and 0.7-μm-gate-length HEMTs with a cu...

The concise algorithm by which protein functions are encoded in DNA sequences, and the flexible and adaptable operating systems of biological organisms, have long been coveted by computer scientists. Similarly, the information storage capacity of computers and their extraordinary problem-solving speed have been the envy of biologists. The parallels between the two systems are many, and it would...

This paper reports on the veriication of two of the IFIP WG10.5 benchmarks | the multi-plier and systolic matrix multiplier. The circuit implementations are timed, detailed gate-level descriptions, and the speciication is given using the temporal logic TL n , a quaternary-valued temporal logic. A practical, integrated theorem-proving/model checking system based on the compositional theory for T...

This paper models the clock behavior in a sequential circuit by a quaternary variable and uses this representation to propose and analyze two clock-gating techniques. It then uses the covering relationship between the triggering transition of the clock and the active cycles of various flip flops to generate a derived clock for each flip flop in the circuit. A technique for clock gating is also ...