A current mirror (CM) based on self cascode MOSFETs low voltage analog and mixed mode structures has been proposed. The proposed CM has high output impedance and can operate at 0.5 V. P-Spice simulations confirm the high performance of this CM with a bandwidth of 6.0 GHz at input current of 100 μA. Keywords—Current Mirrors, Composite Cascode Structure, Current Source/Sink.

We present an area-efficient and low-power four-channel 25-Gb/s trans-impedance amplifier for Rx analog front-end (Rx-AFE) on optical receiver. The proposed circuit features a local negative-feedback (TIA) to expand the bandwidth. TIA post-amplifier use regulated cascode (RGC) topology two differential stages with inductive peaking bandwidth extension technique acquire 19.6 GHz of -3 dB 53.3 dB...

A Low Noise Amplifier (LNA) is an important building block in the RF receiver chain. Typically the LNA should provide acceptable gain and high linearity while maintaining low noise and power consumption. To optimize these conflicting goals the so-called Cascode topology is widely used in industry. Here the gain cell is comprised of two transistors, one in common-source and the other in common g...

In this paper we report the fabrication, design and testing of an uncooled infrared imager based on an active pixel heat balancing technique. The imager is fabricated using a commercial CMOS process plus a simple electrochemical etch stop releasing step. The basic active pixel detector structure consists of a simple cascode CMOS amplifier in which the PMOS devices are built inside a thermally-i...

This paper presents an optimized methodology to folded cascode operational transconductance amplifier (OTA) design. The design is done in different regions of operation, weak inversion, strong inversion and moderate inversion using the gm/ID methodology in order to optimize MOS transistor sizing. Using 0.35μm CMOS process, the designed folded cascode OTA achieves a DC gain of 77.5dB and a unity...

In recent years, there has been an increasing demand for high-speed digital circuits at low power consumption. This paper presents a design of input stage of Operational Amplifier i.e cascode differential amplifier using a standard 65nm CMOS Technology.A comparison betweem gate-driven, bulk-driven and cascode bulk driven bulk-driven differential amplifier is described. The Results demonstrate t...

A body-biasing compensation scheme based on two proportional-toabsolute-temperature (PTAT) circuits is proposed to reduce the PVT variability of the DC gain of cascode amplifiers. A brief description of a basic PTAT is given as well as its application to cascode-based operational transconductance amplifiers. Simulation results show that the proposed compensated circuit amplifier exhibit a (DC) ...