As SRAMs continue to grow and comprise larger percentages of the area and power consumption in advanced systems, the need to minimize static currents becomes essential. This brief presents a novel 9T Quasi-Static RAM Bitcell that provides aggressive leakage reduction and high write margins. The quasi-static operation method of this cell, based on internal feedback and leakage ratios, minimizes ...

In present scenario high speed and low power devices in signal processing system is generally needed the efficient design and reduced complexity of converters, therefore conventional flash ADC is not fully meet the required specifications. ADC with high speed and low resolution is required in present communication technologies. Lower leakage current with low power consumption is considerable ef...

This paper introduces a Modified Error Data Normalized Step Size (MEDNSS) algorithm in which time varying step size depends upon normalization of both error and data vector. An Adaptive Noise Canceller (ANC) is used to improve the system performance in the presence of signal leakage components or signal crosstalk. This ANC consists of three microphones and two adaptive filters that automaticall...

In this paper a circuit design technique to improve noise tolerant of a new CMOS domino logic family called feedthrough logic is presented. The feedthrough logic improves the performance of arithmetic circuit as compared to static CMOS and domino logic but its noise tolerant is very less. A 2-input NAND gate is designed by the proposed technique. The ANTE (average noise threshold energy) metric...

For a solid lattice, we rederive the Continuous Spontaneous Localization (CSL) noise total energy gain of test mass starting from Lindblad formulation, and similar point geometry factor governing center gain. We then suggest that can be used as way to distinguish between low temperature cantilever motion saturation arising CSL noise, thermal leakage.

– Four different dynamic circuit techniques are proposed in this paper for lowering the active mode power consumption, increasing the speed, enhancing the noise immunity, and reducing the subthreshold leakage energy of domino logic circuits. A variable threshold voltage keeper circuit technique is proposed for simultaneous power reduction and speed enhancement of domino logic circuits. The thre...

The molecular mechanism underlying the retention of intron-containing mRNAs in the nucleus is not understood. Here, we show that retention of intron-containing mRNAs in yeast is mediated by perinuclearly located Mlp1. Deletion of MLP1 impairs retention while having no effect on mRNA splicing. The Mlp1-dependent leakage of intron-containing RNAs is increased in presence of ts-prp18 delta, a spli...