نتایج جستجو برای: sequential circuit

تعداد نتایج: 198761  

1995
José C. Monteiro John Rinderknecht Srinivas Devadas Abhijit Ghosh

Precomputation is a recently proposed logic optimization technique which selectively disables the inputs of a sequential logic circuit, thereby reducing switching activity and power dissipation, without changing logic functionality. In this paper, we present new precomputation architectures for both combinational and sequential logic and describe new precomputation-based logic synthesis methods...

2006
K. Somasundaram

Sequential graph partitioning algorithms have been developed to fulfill the requirements of emerging multi-phase problems in circuit delay models. In this paper we propose a heuristic algorithm for kpartition, which minimizes the circuit delay and cut size. Experimental results with MCNC benchmark circuits have shown that the delay in the circuit can be reduced by marginally in comparison with ...

2004
Tsuyoshi Iwagaki

VLSI (Very Large Scale Integration) circuits are basic components of today’s complex digital systems. In order to realize dependable digital systems, VLSI circuits should be highly reliable. VLSI testing plays an important role in satisfying this requirement. VLSI testing is to check whether faults exist in a circuit, and it consists of two main phases: test generation and test application. In ...

1993
Kent L. Einspahr Sharad C. Seth Vishwani D. Agrawal

An implementation of a design for testability model for sequential circuits is presented. The jlip-jlops in a sequential circuit are partitioned to reduce the number of cycles and the path lengths in each partition, thereby reducing the complezity of test generation. The implementation includes a Podem-based test generator. Preliminary results using the Contest sequential test generator are pre...

Hatami, Robab , Karshenas, Hamid Reza , Rohani, Mohammad Hosein , Zeinal Hamadani, Ali ,

  Electric power industry have always try to provide reliable electricity to customers and at the same time decrease system costs. High Voltage circuit-breakers are an essential part of the power network. This study has developed a maintenance and replacement scheduling model for high voltage circuit- breakers that minimize maintenance costs while maintaining the acceptable reliability. This mo...

2011
Jan A. Bergstra Alban Ponse

Short-circuit evaluation denotes the semantics of propositional connectives in which the second argument is only evaluated if the first argument does not suffice to determine the value of the expression. In programming, short-circuit evaluation is widely used. We review proposition algebra [2010], an algebraic approach to propositional logic with side effects that models short-circuit evaluatio...

Journal: :International Journal of Advanced Engineering Research and Science 2016

Journal: :IEEE Trans. on CAD of Integrated Circuits and Systems 2001
Hakan Yalcin Mohammad Mortazavi Robert Palermo Cyrus Bamji Karem A. Sakallah John P. Hayes

In deep submicrometer integrated circuit design, there is a growing need to quickly and accurately characterize the timing of large circuit blocks. Accurate timing characterization requires making available as much timing information as possible at each step of the design process. Conventional fast characterization methods typically employ topological analysis, which can be inaccurate because o...

2002
Robert Thomson Tughrul Arslan

Evolutionary algorithms (EAs) are regularly used both for the solution of scheduling problems, and for the creation of digital circuit designs. This paper describes a unified approach, which mixes the creation of a sequential circuit, with the scheduling and binding of operations. This paper describes how Finite Impulse Response Primitive Operator Filters (FIR POFs) can be created so that they ...

1996
Thomas R. Shiple Gérard Berry Hervé Touati

Traditionally, circuits with combinational loops are found only in asynchronous designs. However, combinational loops can also be useful for synchronous circuit design. Combinational loops can arise from high-level language behavioral compiling, and can be used to reduce circuit size. We provide a symbolic algorithm that detects if a sequential circuit with combinational loops exhibits standard...

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