Arbitrary faults of a single node in a time-triggered architecture (TTA) bus topology system may cause error propagation to correct nodes and may lead to inconsistent system states. This has been observed in validation work using software implemented fault injection (SWIFI) and heavy-ion fault injection techniques in a TTA cluster. In a TTA system, the membership and the clique avoidance algori...

Since 2009, the National Criminal Justice Association (NCJA), with support from the Bureau of Justice Assistance (BJA), has provided training and technical assistance (TTA) in strategic planning to State Criminal Justice Administering Agencies (SAAs) in 20 states, 2 territories, and the District of Columbia. TTA services have been tailored to the needs, planning scopes, and timelines establishe...

The trend in programmable architectures for digital signal processing (DSP) is to move towards high-level language programming, which sets high requirements for compilers to efficiently exploit the instruction level parallelism in modern processors. In this paper, efficiency of transport triggered architectures (TTA) in DSP applications is discussed. The efficiency of a high-level compiler on a...

This paper proposes a SystemC based extension for the modeling of TimeTriggered Architecture (TTA) based real-time embedded systems. The extension called Executable Time-Triggered Model (E-TTM) supports the time-triggered model of computation and provides a time domain deterministic modeling framework based on SystemC. E-TTM can be used from the architectural design phase to support early funct...

Subunit models provide a powerful yet parsimonious description of neural responses to complex stimuli. They are defined by a cascade of two linear-nonlinear (LN) stages, with the first stage defined by a linear convolution with one or more filters and common point nonlinearity, and the second by pooling weights and an output nonlinearity. Recent interest in such models has surged due to their b...