We propose and experimentally demonstrate a method for fault location in optical communication network. This method utilizes the traffic signal transmitted across the network as probe signal, and then locates the fault by correlation technique. Compared with conventional techniques, our method has a simple structure and low operation expenditure, because no additional device is used, such as li...

Synchronous Digital Hierarchy (SDH) is the standard technology for information transmission in broadband optical networks. Unlike systems with unplanned growth, such as those of natural origin or the Internet network, the SDH systems are strictly planned as rings, meshes, stars or tree-branches structures designed to connect different equipments. In spite of that, we have found that the SDH net...

The paper deals with a multi-layer network design problem for a high-speed telecommunication network based on Synchronous Digital Hierarchy (SDH) and Wavelength Division Multiplex (WDM) technology. The network has to carry a certain set of demands with the objective of minimizing the investment in the equipment. The different layers are the fiber-layer, 2,5Gbit/s-, 10Gbit/sand WDM-systems. Seve...

Various protocols have been proposed and developed to manage communication networks efficiently, which are becoming increasingly complex. Of those protocols, SNMP has been popular because it is easy to implement and widely available. However, it has problems in terms of scalability and security. CMIP is a good alternative to SNMP, and OSI MIB provides diverse features to model complex communica...

" Architecture-driven synthesis techniques for mapping digital signal processing algorithms into silicon, " FSMs have a clear and unambiguous notion of a quantum of computation (one state transition), the problem reduces to determining what a quantum of computation is in the semantic model used to manage the concurrency and communication. This model could be a synchronous model, a dataflow mode...

The proposed system is to utilize the renewable resources by digital PWM control of synchronous converter. Usually PWM pulse is being generated through a digital system such as microcontroller or Digital signal controller. In stand – alone application these controllers increases the cost but XILINX FPGA based PWM generation reduces the cost. XILINX FPGA is invented by XILINX which is being cons...

Proliferations of portable devices and increasing design complexity have made low power consumption one of the major factors guiding digital design. The clock distribution and generation circuitry forms a critical component of current synchronous digital system and is known to consume large amount the power budget of the current processor. This paper describes the importance of the sinusoidal c...

The main aim of this project is to deliver an integrated design methodology for synthesising digital systems with mixed synchronous-asynchronous architectures. The proposed technique combines Globally Asynchronous Locally Synchronous (GALS) design with Elastic Logic principles. Elastic Logic and Asynchronous design are envisioned to share a common timing discipline which should simplify the GAL...

An asynchronous circuit, or self-timed circuit, is a sequential digital logic circuit which is not enabled by a global clock signal. Instead of that, they often use signals that indicate completion of operations and instructions, specified by handshaking or simple data transfer protocols. This type is contrasted with a synchronous logic circuit where changes to the output signal values are trig...