In this paper, we establish the existence and uniqueness of common coupled xed point results for three covariant mappings in bipolar metric spaces. Moreover, we give an illustration which presents the applicability of the achieved results also we provided applications to homotopy theory as well as integral equations.

This paper describes a Modelica package for fixedpoint arithmetics and automatic fixed point code generation for embedded systems and FPGA applications. Using Dymola [1] to investigate the dynamic behavior of the original model a fixed point representation is automatically generated. The model can then be simulated, using fixed point arithmetics to verify the fixed-point representation. Finally...

We discuss QCD condensate contributions to the gluon propagator both in the fixedpoint gauge and in covariant gauges for the external QCD vacuum gluon fields with the conclusion that a covariant gauge is essential to obtain a gauge invariant QCD vacuum energy density difference and to retain the unitarity of the quark scattering amplitude. The gauge-invariant QCD condensate contributions to the...

It has been shown that a 32-bit logarithmic arithmetic unit can operate faster than, and maintain the accuracy of, a 32-bit floating point unit. It uses the logarithmic number system (LNS), in which a real number is represented as a fixedpoint logarithm. In this paper we investigate the implementation of three fast affine projection (FAP) algorithms using LNS. We propose a simplified Conjugate ...

This paper investigates the realization of an efficient low-complexity turbo-equalizer under fixedpoint data representation and computation constraints. We address the quantization issues that arise in the receiver design, and expose a simple computation procedure for the equalizer coefficients. The proposed solution is well-suited for a DSP implementation on low cost 16 bits fixed-point device...

This paper introduces a simple Markov process inspired by the problem of quasicrystal growth. It acts over two-letter words by randomly performing flips, a local transformation which exchanges two consecutive different letters. More precisely, only the flips which do not increase the number of pairs of consecutive identical letters are allowed. Fixed-points of such a process thus perfectly alte...

Study deals with implementations of fixed-point division modules based on different algorithms on basis of Xilinx FPGAs. We show that our implementation of the nonrestoring algorithm is significantly faster and smaller than the 32-bit IP Core “Pipelined Divider” from Xilinx. For example, the speed of the 32-bit designed module is almost 245 MHz vs. 193 MHz from Xilinx divider. Moreover, high-sp...

The Uzawa algorithm is an iterative method for the solution of saddle-point problems, which arise in many applications, including fluid dynamics. Viewing the Uzawa algorithm as a fixedpoint iteration, we explore the use of Anderson acceleration (also knownas Anderson mixing) to improve the convergence. We compare the performance of the preconditioned Uzawa algorithm with and without acceleratio...