نتایج جستجو برای: deep sub
تعداد نتایج: 413603 فیلتر نتایج به سال:
Suppressing the leakage current in memories is critical in low-power design. By reducing the standby supply voltage (VDD) to its limit, which is the data retention voltage (DRV), leakage power can be substantially reduced. This paper models the DRV of a standard low leakage SRAM module as a function of process and design parameters, and analyzes the SRAM cell stability when VDD approaches DRV. ...
In portable, three dimensional, and ultra-fast ultrasound (US) imaging systems, there is an increasing need to reconstruct high quality images from a limited number of RF data from receiver (Rx) or scan-line (SC) sub-sampling. However, due to the severe side lobe artifacts from RF sub-sampling, the standard beamformer often produces blurry images with less contrast that are not suitable for dia...
We present a novel methodology for characterization of sub-quartermicron CMOS technologies. It involves process calibration, device calibration employing twodimensional device simulation and automated Technology Computer Aided Design (TCAD) optimization, and, finally, transient mixed-mode device/circuit simulation. The proposed methodology was tested on 0.25 m technology and applied to 0.13 m t...
The continuous demand for improved CMOS transistors necessitate smailer device dimensions. The reduction in chip size into the deep sub-micron dimensions opens up new scientific and engineering challenges. One of the most critical material in developing deep sub-micron MOS transistors is high quality ultrathin (a few nm) gate dielectric film. As the gate dielectric thickness is reduced to below...
In order to confirm benefits of a deep sub-micron FD-SOI and to identify possible issues concerning front-end circuits with the FD-SOI, we have submitted a small design to Oki Electric Industry Co., Ltd. via the multi-chip project service of VDEC, the University of Tokyo. The initial test results and future plans for development are presented. r 2007 Elsevier B.V. All rights reserved. PACS: 07....
Interconnect will be a major bottleneck for deep sub-micron technologies in the years to come. This dissertation addresses the communication aspect from a power consumption and transmission speed perspective. A model for the energy consumption associated with data transmission through deep sub-micron technology buses is derived. The capacitive and inductive coupling between the bus lines as wel...
We present a novel methodology for characterization of sub-quartermicron CMOS technologies. It involves process calibration, device calibration employing twodimensional device simulation and automated Technology Computer Aided Design (TCAD) optimization, and, finally, transient mixed-mode device/circuit simulation. The proposed methodology was tested on 0.25 m technology and applied to 0.13 m t...
One of the unique properties of northern landforms of zanjanrood catchment is having smooth surfaces that have been interrupted by deep valleys. Rivers that don’t have a wide catchment upper their front mount are running in parallel deep valleys that the topographical situations don’t let them to receive around surface runoffs. This situation has made them to move in parallel form and not to jo...
Most of the terrestrial deep subsurfaces are oligotrophic environments in which some gases, mainly H2 , CH4 and CO2 play an important role as energy and/or carbon sources. In this work, we assessed their biotic abiotic origin samples from subsurface hard-rock cores Iberian Pyrite Belt (IPB) at three different depths (414, 497 520?m). One set was sterilized (abiotic control) all were incubated u...
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